1/*
2 * Copyright (c) 2014 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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44
45#ifndef __CPU_EXEC_CONTEXT_HH__
46#define __CPU_EXEC_CONTEXT_HH__
47
48#include "arch/registers.hh"
49#include "base/types.hh"
50#include "config/the_isa.hh"
51#include "cpu/base.hh"
52#include "cpu/static_inst_fwd.hh"
53#include "cpu/translation.hh"
54#include "mem/request.hh"
55
56/**
57 * The ExecContext is an abstract base class the provides the
58 * interface used by the ISA to manipulate the state of the CPU model.
59 *

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281 /** @} */
282
283 /**
284 * @{
285 * @name MIPS-Specific Interfaces
286 */
287
288#if THE_ISA == MIPS_ISA
289 virtual MiscReg readRegOtherThread(int regIdx,
290 ThreadID tid = InvalidThreadID) = 0;
291 virtual void setRegOtherThread(int regIdx, MiscReg val,
292 ThreadID tid = InvalidThreadID) = 0;
293#endif
294
295 /** @} */
296};
297
298#endif // __CPU_EXEC_CONTEXT_HH__