1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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38#include "sim/serialize.hh"
39#include "sim/byteswap.hh"
40
41// @todo: Figure out a more architecture independent way to obtain the ITB and
42// DTB pointers.
43class AlphaDTB;
44class AlphaITB;
45class BaseCPU;
46class EndQuiesceEvent;
47class Event;
48class TranslatingPort;
49class FunctionalPort;
50class VirtualPort;
51class Process;
52class System;
53namespace Kernel {
54 class Statistics;
55};
56
57class ExecContext
58{
59 protected:
60 typedef TheISA::RegFile RegFile;
61 typedef TheISA::MachInst MachInst;
62 typedef TheISA::IntReg IntReg;
63 typedef TheISA::FloatReg FloatReg;

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97
98#if FULL_SYSTEM
99 virtual System *getSystemPtr() = 0;
100
101 virtual AlphaITB *getITBPtr() = 0;
102
103 virtual AlphaDTB * getDTBPtr() = 0;
104
105 virtual Kernel::Statistics *getKernelStats() = 0;
106
107 virtual FunctionalPort *getPhysPort() = 0;
108
109 virtual VirtualPort *getVirtPort(ExecContext *xc = NULL) = 0;
110
111 virtual void delVirtPort(VirtualPort *vp) = 0;
112#else
113 virtual TranslatingPort *getMemPort() = 0;
114

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139 virtual void takeOverFrom(ExecContext *old_context) = 0;
140
141 virtual void regStats(const std::string &name) = 0;
142
143 virtual void serialize(std::ostream &os) = 0;
144 virtual void unserialize(Checkpoint *cp, const std::string &section) = 0;
145
146#if FULL_SYSTEM
147 virtual EndQuiesceEvent *getQuiesceEvent() = 0;
148
149 // Not necessarily the best location for these...
150 // Having an extra function just to read these is obnoxious
151 virtual Tick readLastActivate() = 0;
152 virtual Tick readLastSuspend() = 0;
153
154 virtual void profileClear() = 0;
155 virtual void profileSample() = 0;
156#endif
157
158 virtual int getThreadNum() = 0;
159
160 // Also somewhat obnoxious. Really only used for the TLB fault.
161 // However, may be quite useful in SPARC.
162 virtual TheISA::MachInst getInst() = 0;
163
164 virtual void copyArchRegs(ExecContext *xc) = 0;
165
166 virtual void clearArchRegs() = 0;
167

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210
211 // Also not necessarily the best location for these two. Hopefully will go
212 // away once we decide upon where st cond failures goes.
213 virtual unsigned readStCondFailures() = 0;
214
215 virtual void setStCondFailures(unsigned sc_failures) = 0;
216
217#if FULL_SYSTEM
218 virtual bool inPalMode() = 0;
219#endif
220
221 // Only really makes sense for old CPU model. Still could be useful though.
222 virtual bool misspeculating() = 0;
223
224#if !FULL_SYSTEM
225 virtual IntReg getSyscallArg(int i) = 0;
226
227 // used to shift args for indirect syscall
228 virtual void setSyscallArg(int i, IntReg val) = 0;
229
230 virtual void setSyscallReturn(SyscallReturn return_value) = 0;
231
232
233 // Same with st cond failures.
234 virtual Counter readFuncExeInst() = 0;
235#endif
236
237 virtual void changeRegFileContext(RegFile::ContextParam param,
238 RegFile::ContextVal val) = 0;
239};
240
241template <class XC>
242class ProxyExecContext : public ExecContext

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258
259#if FULL_SYSTEM
260 System *getSystemPtr() { return actualXC->getSystemPtr(); }
261
262 AlphaITB *getITBPtr() { return actualXC->getITBPtr(); }
263
264 AlphaDTB *getDTBPtr() { return actualXC->getDTBPtr(); }
265
266 Kernel::Statistics *getKernelStats() { return actualXC->getKernelStats(); }
267
268 FunctionalPort *getPhysPort() { return actualXC->getPhysPort(); }
269
270 VirtualPort *getVirtPort(ExecContext *xc = NULL) { return actualXC->getVirtPort(xc); }
271
272 void delVirtPort(VirtualPort *vp) { return actualXC->delVirtPort(vp); }
273#else
274 TranslatingPort *getMemPort() { return actualXC->getMemPort(); }
275

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302
303 void regStats(const std::string &name) { actualXC->regStats(name); }
304
305 void serialize(std::ostream &os) { actualXC->serialize(os); }
306 void unserialize(Checkpoint *cp, const std::string &section)
307 { actualXC->unserialize(cp, section); }
308
309#if FULL_SYSTEM
310 EndQuiesceEvent *getQuiesceEvent() { return actualXC->getQuiesceEvent(); }
311
312 Tick readLastActivate() { return actualXC->readLastActivate(); }
313 Tick readLastSuspend() { return actualXC->readLastSuspend(); }
314
315 void profileClear() { return actualXC->profileClear(); }
316 void profileSample() { return actualXC->profileSample(); }
317#endif
318
319 int getThreadNum() { return actualXC->getThreadNum(); }
320
321 // @todo: Do I need this?
322 MachInst getInst() { return actualXC->getInst(); }
323
324 // @todo: Do I need this?
325 void copyArchRegs(ExecContext *xc) { actualXC->copyArchRegs(xc); }
326
327 void clearArchRegs() { actualXC->clearArchRegs(); }
328

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383 Fault setMiscRegWithEffect(int misc_reg, const MiscReg &val)
384 { return actualXC->setMiscRegWithEffect(misc_reg, val); }
385
386 unsigned readStCondFailures()
387 { return actualXC->readStCondFailures(); }
388
389 void setStCondFailures(unsigned sc_failures)
390 { actualXC->setStCondFailures(sc_failures); }
391#if FULL_SYSTEM
392 bool inPalMode() { return actualXC->inPalMode(); }
393#endif
394
395 // @todo: Fix this!
396 bool misspeculating() { return actualXC->misspeculating(); }
397
398#if !FULL_SYSTEM
399 IntReg getSyscallArg(int i) { return actualXC->getSyscallArg(i); }
400
401 // used to shift args for indirect syscall
402 void setSyscallArg(int i, IntReg val)
403 { actualXC->setSyscallArg(i, val); }
404
405 void setSyscallReturn(SyscallReturn return_value)
406 { actualXC->setSyscallReturn(return_value); }
407
408
409 Counter readFuncExeInst() { return actualXC->readFuncExeInst(); }
410#endif
411
412 void changeRegFileContext(RegFile::ContextParam param,
413 RegFile::ContextVal val)
414 {
415 actualXC->changeRegFileContext(param, val);
416 }
417};
418
419#endif