thread_context.hh (3548:85e64c82c522) thread_context.hh (4172:141705d83494)
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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243
244 void setNextNPC(uint64_t val)
245 {
246 actualTC->setNextNPC(val);
247 checkerTC->setNextNPC(val);
248 checkerCPU->recordNextPCChange(val);
249 }
250
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 234 unchanged lines hidden (view full) ---

243
244 void setNextNPC(uint64_t val)
245 {
246 actualTC->setNextNPC(val);
247 checkerTC->setNextNPC(val);
248 checkerCPU->recordNextPCChange(val);
249 }
250
251 MiscReg readMiscRegNoEffect(int misc_reg)
252 { return actualTC->readMiscRegNoEffect(misc_reg); }
253
251 MiscReg readMiscReg(int misc_reg)
252 { return actualTC->readMiscReg(misc_reg); }
253
254 MiscReg readMiscReg(int misc_reg)
255 { return actualTC->readMiscReg(misc_reg); }
256
254 MiscReg readMiscRegWithEffect(int misc_reg)
255 { return actualTC->readMiscRegWithEffect(misc_reg); }
257 void setMiscRegNoEffect(int misc_reg, const MiscReg &val)
258 {
259 checkerTC->setMiscRegNoEffect(misc_reg, val);
260 actualTC->setMiscRegNoEffect(misc_reg, val);
261 }
256
257 void setMiscReg(int misc_reg, const MiscReg &val)
258 {
259 checkerTC->setMiscReg(misc_reg, val);
260 actualTC->setMiscReg(misc_reg, val);
261 }
262
262
263 void setMiscReg(int misc_reg, const MiscReg &val)
264 {
265 checkerTC->setMiscReg(misc_reg, val);
266 actualTC->setMiscReg(misc_reg, val);
267 }
268
263 void setMiscRegWithEffect(int misc_reg, const MiscReg &val)
264 {
265 checkerTC->setMiscRegWithEffect(misc_reg, val);
266 actualTC->setMiscRegWithEffect(misc_reg, val);
267 }
268
269 unsigned readStCondFailures()
270 { return actualTC->readStCondFailures(); }
271
272 void setStCondFailures(unsigned sc_failures)
273 {
274 checkerTC->setStCondFailures(sc_failures);
275 actualTC->setStCondFailures(sc_failures);
276 }

--- 31 unchanged lines hidden --- 		269 unsigned readStCondFailures()
270 { return actualTC->readStCondFailures(); }
271
272 void setStCondFailures(unsigned sc_failures)
273 {
274 checkerTC->setStCondFailures(sc_failures);
275 actualTC->setStCondFailures(sc_failures);
276 }

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