thread_context.hh (10664:61a0b02aa800) | thread_context.hh (10698:829adc48e175) |
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1/* 2 * Copyright (c) 2011-2012 ARM Limited 3 * Copyright (c) 2013 Advanced Micro Devices, Inc. 4 * All rights reserved 5 * 6 * The license below extends only to copyright in the software and shall 7 * not be construed as granting a license to any other intellectual 8 * property including but not limited to intellectual property relating --- 261 unchanged lines hidden (view full) --- 270 /** Reads this thread's next PC. */ 271 Addr nextInstAddr() 272 { return actualTC->nextInstAddr(); } 273 274 /** Reads this thread's next PC. */ 275 MicroPC microPC() 276 { return actualTC->microPC(); } 277 | 1/* 2 * Copyright (c) 2011-2012 ARM Limited 3 * Copyright (c) 2013 Advanced Micro Devices, Inc. 4 * All rights reserved 5 * 6 * The license below extends only to copyright in the software and shall 7 * not be construed as granting a license to any other intellectual 8 * property including but not limited to intellectual property relating --- 261 unchanged lines hidden (view full) --- 270 /** Reads this thread's next PC. */ 271 Addr nextInstAddr() 272 { return actualTC->nextInstAddr(); } 273 274 /** Reads this thread's next PC. */ 275 MicroPC microPC() 276 { return actualTC->microPC(); } 277 |
278 MiscReg readMiscRegNoEffect(int misc_reg) | 278 MiscReg readMiscRegNoEffect(int misc_reg) const |
279 { return actualTC->readMiscRegNoEffect(misc_reg); } 280 281 MiscReg readMiscReg(int misc_reg) 282 { return actualTC->readMiscReg(misc_reg); } 283 284 void setMiscRegNoEffect(int misc_reg, const MiscReg &val) 285 { 286 DPRINTF(Checker, "Setting misc reg with no effect: %d to both Checker" --- 54 unchanged lines hidden --- | 279 { return actualTC->readMiscRegNoEffect(misc_reg); } 280 281 MiscReg readMiscReg(int misc_reg) 282 { return actualTC->readMiscReg(misc_reg); } 283 284 void setMiscRegNoEffect(int misc_reg, const MiscReg &val) 285 { 286 DPRINTF(Checker, "Setting misc reg with no effect: %d to both Checker" --- 54 unchanged lines hidden --- |