1/*
2 * Copyright (c) 2011-2012 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating
9 * to a hardware implementation of the functionality of the software
10 * licensed hereunder. You may use the software subject to the license
11 * terms below provided that you ensure that this notice is replicated

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212 { return actualTC->readIntReg(reg_idx); }
213
214 FloatReg readFloatReg(int reg_idx)
215 { return actualTC->readFloatReg(reg_idx); }
216
217 FloatRegBits readFloatRegBits(int reg_idx)
218 { return actualTC->readFloatRegBits(reg_idx); }
219
220 CCReg readCCReg(int reg_idx)
221 { return actualTC->readCCReg(reg_idx); }
222
223 void setIntReg(int reg_idx, uint64_t val)
224 {
225 actualTC->setIntReg(reg_idx, val);
226 checkerTC->setIntReg(reg_idx, val);
227 }
228
229 void setFloatReg(int reg_idx, FloatReg val)
230 {
231 actualTC->setFloatReg(reg_idx, val);
232 checkerTC->setFloatReg(reg_idx, val);
233 }
234
235 void setFloatRegBits(int reg_idx, FloatRegBits val)
236 {
237 actualTC->setFloatRegBits(reg_idx, val);
238 checkerTC->setFloatRegBits(reg_idx, val);
239 }
240
241 void setCCReg(int reg_idx, CCReg val)
242 {
243 actualTC->setCCReg(reg_idx, val);
244 checkerTC->setCCReg(reg_idx, val);
245 }
246
247 /** Reads this thread's PC state. */
248 TheISA::PCState pcState()
249 { return actualTC->pcState(); }
250
251 /** Sets this thread's PC state. */
252 void pcState(const TheISA::PCState &val)
253 {
254 DPRINTF(Checker, "Changing PC to %s, old PC %s\n",

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294 DPRINTF(Checker, "Setting misc reg with effect: %d to both Checker"
295 " and O3..\n", misc_reg);
296 checkerTC->setMiscReg(misc_reg, val);
297 actualTC->setMiscReg(misc_reg, val);
298 }
299
300 int flattenIntIndex(int reg) { return actualTC->flattenIntIndex(reg); }
301 int flattenFloatIndex(int reg) { return actualTC->flattenFloatIndex(reg); }
302 int flattenCCIndex(int reg) { return actualTC->flattenCCIndex(reg); }
303
304 unsigned readStCondFailures()
305 { return actualTC->readStCondFailures(); }
306
307 void setStCondFailures(unsigned sc_failures)
308 {
309 actualTC->setStCondFailures(sc_failures);
310 }

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326 void setFloatRegFlat(int idx, FloatReg val)
327 { actualTC->setFloatRegFlat(idx, val); }
328
329 FloatRegBits readFloatRegBitsFlat(int idx)
330 { return actualTC->readFloatRegBitsFlat(idx); }
331
332 void setFloatRegBitsFlat(int idx, FloatRegBits val)
333 { actualTC->setFloatRegBitsFlat(idx, val); }
334
335 CCReg readCCRegFlat(int idx)
336 { return actualTC->readCCRegFlat(idx); }
337
338 void setCCRegFlat(int idx, CCReg val)
339 { actualTC->setCCRegFlat(idx, val); }
340};
341
342#endif // __CPU_CHECKER_EXEC_CONTEXT_HH__