1/*
2 * Copyright (c) 2011-2012 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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211 { return actualTC->readFloatReg(reg_idx); }
212
213 FloatRegBits readFloatRegBits(int reg_idx)
214 { return actualTC->readFloatRegBits(reg_idx); }
215
216 CCReg readCCReg(int reg_idx)
217 { return actualTC->readCCReg(reg_idx); }
218
219 void setIntReg(int reg_idx, uint64_t val)
220 {
221 actualTC->setIntReg(reg_idx, val);
222 checkerTC->setIntReg(reg_idx, val);
223 }
224
225 void setFloatReg(int reg_idx, FloatReg val)
226 {

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235 }
236
237 void setCCReg(int reg_idx, CCReg val)
238 {
239 actualTC->setCCReg(reg_idx, val);
240 checkerTC->setCCReg(reg_idx, val);
241 }
242
243 /** Reads this thread's PC state. */
244 TheISA::PCState pcState()
245 { return actualTC->pcState(); }
246
247 /** Sets this thread's PC state. */
248 void pcState(const TheISA::PCState &val)
249 {
250 DPRINTF(Checker, "Changing PC to %s, old PC %s\n",

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291 " and O3..\n", misc_reg);
292 checkerTC->setMiscReg(misc_reg, val);
293 actualTC->setMiscReg(misc_reg, val);
294 }
295
296 int flattenIntIndex(int reg) { return actualTC->flattenIntIndex(reg); }
297 int flattenFloatIndex(int reg) { return actualTC->flattenFloatIndex(reg); }
298 int flattenCCIndex(int reg) { return actualTC->flattenCCIndex(reg); }
299 int flattenMiscIndex(int reg) { return actualTC->flattenMiscIndex(reg); }
300
301 unsigned readStCondFailures()
302 { return actualTC->readStCondFailures(); }
303
304 void setStCondFailures(unsigned sc_failures)
305 {
306 actualTC->setStCondFailures(sc_failures);

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326 void setFloatRegBitsFlat(int idx, FloatRegBits val)
327 { actualTC->setFloatRegBitsFlat(idx, val); }
328
329 CCReg readCCRegFlat(int idx)
330 { return actualTC->readCCRegFlat(idx); }
331
332 void setCCRegFlat(int idx, CCReg val)
333 { actualTC->setCCRegFlat(idx, val); }
334};
335
336#endif // __CPU_CHECKER_EXEC_CONTEXT_HH__