cpu.hh (9918:2c7219e2d999) cpu.hh (9920:028e4da64b42)
1/*
2 * Copyright (c) 2011 ARM Limited
1/*
2 * Copyright (c) 2011 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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218 }
219
220 FloatRegBits readFloatRegOperandBits(const StaticInst *si, int idx)
221 {
222 int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Reg_Base;
223 return thread->readFloatRegBits(reg_idx);
224 }
225
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating
9 * to a hardware implementation of the functionality of the software
10 * licensed hereunder. You may use the software subject to the license
11 * terms below provided that you ensure that this notice is replicated

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219 }
220
221 FloatRegBits readFloatRegOperandBits(const StaticInst *si, int idx)
222 {
223 int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Reg_Base;
224 return thread->readFloatRegBits(reg_idx);
225 }
226
227 uint64_t readCCRegOperand(const StaticInst *si, int idx)
228 {
229 int reg_idx = si->srcRegIdx(idx) - TheISA::CC_Reg_Base;
230 return thread->readCCReg(reg_idx);
231 }
232
226 template <class T>
227 void setResult(T t)
228 {
229 Result instRes;
230 instRes.set(t);
231 result.push(instRes);
232 }
233

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247 void setFloatRegOperandBits(const StaticInst *si, int idx,
248 FloatRegBits val)
249 {
250 int reg_idx = si->destRegIdx(idx) - TheISA::FP_Reg_Base;
251 thread->setFloatRegBits(reg_idx, val);
252 setResult<uint64_t>(val);
253 }
254
233 template <class T>
234 void setResult(T t)
235 {
236 Result instRes;
237 instRes.set(t);
238 result.push(instRes);
239 }
240

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254 void setFloatRegOperandBits(const StaticInst *si, int idx,
255 FloatRegBits val)
256 {
257 int reg_idx = si->destRegIdx(idx) - TheISA::FP_Reg_Base;
258 thread->setFloatRegBits(reg_idx, val);
259 setResult<uint64_t>(val);
260 }
261
262 void setCCRegOperand(const StaticInst *si, int idx, uint64_t val)
263 {
264 int reg_idx = si->destRegIdx(idx) - TheISA::CC_Reg_Base;
265 thread->setCCReg(reg_idx, val);
266 setResult<uint64_t>(val);
267 }
268
255 bool readPredicate() { return thread->readPredicate(); }
256 void setPredicate(bool val)
257 {
258 thread->setPredicate(val);
259 }
260
261 TheISA::PCState pcState() { return thread->pcState(); }
262 void pcState(const TheISA::PCState &val)

--- 179 unchanged lines hidden --- 		269 bool readPredicate() { return thread->readPredicate(); }
270 void setPredicate(bool val)
271 {
272 thread->setPredicate(val);
273 }
274
275 TheISA::PCState pcState() { return thread->pcState(); }
276 void pcState(const TheISA::PCState &val)

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