cpu.hh (2840:227f7c4f8c81) cpu.hh (2871:7ed5c9ef3eb6)
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 113 unchanged lines hidden (view full) ---

122 void setIcachePort(Port *icache_port);
123
124 Port *icachePort;
125
126 void setDcachePort(Port *dcache_port);
127
128 Port *dcachePort;
129
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 113 unchanged lines hidden (view full) ---

122 void setIcachePort(Port *icache_port);
123
124 Port *icachePort;
125
126 void setDcachePort(Port *dcache_port);
127
128 Port *dcachePort;
129
130 virtual Port *getPort(const std::string &name, int idx)
131 {
132 panic("Not supported on checker!");
133 return NULL;
134 }
135
130 public:
131 // Primary thread being run.
132 SimpleThread *thread;
133
134 ThreadContext *tc;
135
136 AlphaITB *itb;
137 AlphaDTB *dtb;

--- 264 unchanged lines hidden --- 		136 public:
137 // Primary thread being run.
138 SimpleThread *thread;
139
140 ThreadContext *tc;
141
142 AlphaITB *itb;
143 AlphaDTB *dtb;

--- 264 unchanged lines hidden ---