cpu.hh (13582:989577bf6abc) cpu.hh (13610:5d5404ac6288)
1/*
1/*
2 * Copyright (c) 2011, 2016 ARM Limited
2 * Copyright (c) 2011, 2016-2017 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating
9 * to a hardware implementation of the functionality of the software
10 * licensed hereunder. You may use the software subject to the license

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299
300 VecElem
301 readVecElemOperand(const StaticInst *si, int idx) const override
302 {
303 const RegId& reg = si->srcRegIdx(idx);
304 return thread->readVecElem(reg);
305 }
306
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating
9 * to a hardware implementation of the functionality of the software
10 * licensed hereunder. You may use the software subject to the license

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299
300 VecElem
301 readVecElemOperand(const StaticInst *si, int idx) const override
302 {
303 const RegId& reg = si->srcRegIdx(idx);
304 return thread->readVecElem(reg);
305 }
306
307 const VecPredRegContainer&
308 readVecPredRegOperand(const StaticInst *si, int idx) const override
309 {
310 const RegId& reg = si->srcRegIdx(idx);
311 assert(reg.isVecPredReg());
312 return thread->readVecPredReg(reg);
313 }
314
315 VecPredRegContainer&
316 getWritableVecPredRegOperand(const StaticInst *si, int idx) override
317 {
318 const RegId& reg = si->destRegIdx(idx);
319 assert(reg.isVecPredReg());
320 return thread->getWritableVecPredReg(reg);
321 }
322
307 CCReg
308 readCCRegOperand(const StaticInst *si, int idx) override
309 {
310 const RegId& reg = si->srcRegIdx(idx);
311 assert(reg.isCCReg());
312 return thread->readCCReg(reg.index());
313 }
314

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331 template<typename T>
332 void
333 setVecElemResult(T&& t)
334 {
335 result.push(InstResult(std::forward<T>(t),
336 InstResult::ResultType::VecElem));
337 }
338
323 CCReg
324 readCCRegOperand(const StaticInst *si, int idx) override
325 {
326 const RegId& reg = si->srcRegIdx(idx);
327 assert(reg.isCCReg());
328 return thread->readCCReg(reg.index());
329 }
330

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347 template<typename T>
348 void
349 setVecElemResult(T&& t)
350 {
351 result.push(InstResult(std::forward<T>(t),
352 InstResult::ResultType::VecElem));
353 }
354
355 template<typename T>
339 void
356 void
357 setVecPredResult(T&& t)
358 {
359 result.push(InstResult(std::forward<T>(t),
360 InstResult::ResultType::VecPredReg));
361 }
362
363 void
340 setIntRegOperand(const StaticInst *si, int idx, RegVal val) override
341 {
342 const RegId& reg = si->destRegIdx(idx);
343 assert(reg.isIntReg());
344 thread->setIntReg(reg.index(), val);
345 setScalarResult(val);
346 }
347

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378 const VecElem val) override
379 {
380 const RegId& reg = si->destRegIdx(idx);
381 assert(reg.isVecElem());
382 thread->setVecElem(reg, val);
383 setVecElemResult(val);
384 }
385
364 setIntRegOperand(const StaticInst *si, int idx, RegVal val) override
365 {
366 const RegId& reg = si->destRegIdx(idx);
367 assert(reg.isIntReg());
368 thread->setIntReg(reg.index(), val);
369 setScalarResult(val);
370 }
371

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402 const VecElem val) override
403 {
404 const RegId& reg = si->destRegIdx(idx);
405 assert(reg.isVecElem());
406 thread->setVecElem(reg, val);
407 setVecElemResult(val);
408 }
409
410 void setVecPredRegOperand(const StaticInst *si, int idx,
411 const VecPredRegContainer& val) override
412 {
413 const RegId& reg = si->destRegIdx(idx);
414 assert(reg.isVecPredReg());
415 thread->setVecPredReg(reg, val);
416 setVecPredResult(val);
417 }
418
386 bool readPredicate() const override { return thread->readPredicate(); }
387
388 void
389 setPredicate(bool val) override
390 {
391 thread->setPredicate(val);
392 }
393

--- 214 unchanged lines hidden --- 		419 bool readPredicate() const override { return thread->readPredicate(); }
420
421 void
422 setPredicate(bool val) override
423 {
424 thread->setPredicate(val);
425 }
426

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