cpu.hh (12748:ae5ce8e42de7) cpu.hh (12749:223c83ed9979)
1/*
2 * Copyright (c) 2011, 2016 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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139 BaseTLB *dtb;
140
141 Addr dbg_vtophys(Addr addr);
142
143 // ISAs like ARM can have multiple destination registers to check,
144 // keep them all in a std::queue
145 std::queue<InstResult> result;
146
1/*
2 * Copyright (c) 2011, 2016 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

--- 130 unchanged lines hidden (view full) ---

139 BaseTLB *dtb;
140
141 Addr dbg_vtophys(Addr addr);
142
143 // ISAs like ARM can have multiple destination registers to check,
144 // keep them all in a std::queue
145 std::queue<InstResult> result;
146
147 // Pointer to the one memory request.
148 RequestPtr memReq;
149
150 StaticInstPtr curStaticInst;
151 StaticInstPtr curMacroStaticInst;
152
153 // number of simulated instructions
154 Counter numInst;
155 Counter startNumInst;
156
157 std::queue<int> miscRegIdxs;

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526 void syscall(int64_t callnum, Fault *fault) override { }
527
528 void handleError()
529 {
530 if (exitOnError)
531 dumpAndExit();
532 }
533
147 StaticInstPtr curStaticInst;
148 StaticInstPtr curMacroStaticInst;
149
150 // number of simulated instructions
151 Counter numInst;
152 Counter startNumInst;
153
154 std::queue<int> miscRegIdxs;

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523 void syscall(int64_t callnum, Fault *fault) override { }
524
525 void handleError()
526 {
527 if (exitOnError)
528 dumpAndExit();
529 }
530
534 bool checkFlags(RequestPtr unverified_req, Addr vAddr,
531 bool checkFlags(const RequestPtr &unverified_req, Addr vAddr,
535 Addr pAddr, int flags);
536
537 void dumpAndExit();
538
539 ThreadContext *tcBase() override { return tc; }
540 SimpleThread *threadBase() { return thread; }
541
542 InstResult unverifiedResult;

--- 67 unchanged lines hidden --- 		532 Addr pAddr, int flags);
533
534 void dumpAndExit();
535
536 ThreadContext *tcBase() override { return tc; }
537 SimpleThread *threadBase() { return thread; }
538
539 InstResult unverifiedResult;

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