1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 227 unchanged lines hidden (view full) --- 236 void setFloatRegOperandBits(const StaticInst *si, int idx, 237 FloatRegBits val) 238 { 239 int reg_idx = si->destRegIdx(idx) - TheISA::FP_Base_DepTag; 240 thread->setFloatRegBits(reg_idx, val); 241 result.integer = val; 242 } 243 |
244 uint64_t instAddr() { return thread->instAddr(); } |
245 |
246 uint64_t nextInstAddr() { return thread->nextInstAddr(); } |
247 |
248 MiscReg readMiscRegNoEffect(int misc_reg) 249 { 250 return thread->readMiscRegNoEffect(misc_reg); 251 } 252 253 MiscReg readMiscReg(int misc_reg) 254 { 255 return thread->readMiscReg(misc_reg); --- 118 unchanged lines hidden --- |