1/* 2 * Copyright (c) 2011, 2016 ARM Limited 3 * Copyright (c) 2013 Advanced Micro Devices, Inc. 4 * All rights reserved 5 * 6 * The license below extends only to copyright in the software and shall 7 * not be construed as granting a license to any other intellectual 8 * property including but not limited to intellectual property relating --- 130 unchanged lines hidden (view full) --- 139 BaseTLB *dtb; 140 141 Addr dbg_vtophys(Addr addr); 142 143 // ISAs like ARM can have multiple destination registers to check, 144 // keep them all in a std::queue 145 std::queue<InstResult> result; 146 |
147 StaticInstPtr curStaticInst; 148 StaticInstPtr curMacroStaticInst; 149 150 // number of simulated instructions 151 Counter numInst; 152 Counter startNumInst; 153 154 std::queue<int> miscRegIdxs; --- 368 unchanged lines hidden (view full) --- 523 void syscall(int64_t callnum, Fault *fault) override { } 524 525 void handleError() 526 { 527 if (exitOnError) 528 dumpAndExit(); 529 } 530 |
531 bool checkFlags(const RequestPtr &unverified_req, Addr vAddr, |
532 Addr pAddr, int flags); 533 534 void dumpAndExit(); 535 536 ThreadContext *tcBase() override { return tc; } 537 SimpleThread *threadBase() { return thread; } 538 539 InstResult unverifiedResult; --- 67 unchanged lines hidden --- |