49a50,54
> namespace TheISA
> {
> class ITB;
> class DTB;
> }
51,52d55
< class AlphaITB;
< class AlphaDTB;
99,100c102,103
< AlphaITB *itb;
< AlphaDTB *dtb;
---
> TheISA::ITB *itb;
> TheISA::DTB *dtb;
143,144c146,147
< AlphaITB *itb;
< AlphaDTB *dtb;
---
> TheISA::ITB *itb;
> TheISA::DTB *dtb;
304c307
< MiscReg readMiscRegWithEffect(int misc_reg, Fault &fault)
---
> MiscReg readMiscRegWithEffect(int misc_reg)
306c309
< return thread->readMiscRegWithEffect(misc_reg, fault);
---
> return thread->readMiscRegWithEffect(misc_reg);
309c312
< Fault setMiscReg(int misc_reg, const MiscReg &val)
---
> void setMiscReg(int misc_reg, const MiscReg &val)
316c319
< Fault setMiscRegWithEffect(int misc_reg, const MiscReg &val)
---
> void setMiscRegWithEffect(int misc_reg, const MiscReg &val)