1/*
2 * Copyright (c) 2011 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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107 virtual ~CheckerCPU();
108
109 std::vector<Process*> workload;
110
111 void setSystem(System *system);
112
113 System *systemPtr;
114
115 void setIcachePort(Port *icache_port);
116
117 Port *icachePort;
118
119 void setDcachePort(Port *dcache_port);
120
121 Port *dcachePort;
122
123 virtual Port *getPort(const std::string &name, int idx)
124 {
125 panic("Not supported on checker!");
126 return NULL;
127 }
128
129 public:
130 // Primary thread being run.

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163 Counter numInst;
164 Counter startNumInst;
165
166 std::queue<int> miscRegIdxs;
167
168 TheISA::TLB* getITBPtr() { return itb; }
169 TheISA::TLB* getDTBPtr() { return dtb; }
170
171 virtual Counter totalInstructions() const
172 {
173 return 0;
174 }
175
176 // number of simulated loads
177 Counter numLoad;
178 Counter startNumLoad;
179
180 virtual void serialize(std::ostream &os);
181 virtual void unserialize(Checkpoint *cp, const std::string &section);
182
183 // These functions are only used in CPU models that split

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