1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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97 {
98#if FULL_SYSTEM
99 AlphaITB *itb;
100 AlphaDTB *dtb;
101#else
102 Process *process;
103#endif
104 bool exitOnError;
105 bool warnOnlyOnLoadError;
106 };
107
108 public:
109 CheckerCPU(Params *p);
110 virtual ~CheckerCPU();
111
112 Process *process;

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143 AlphaDTB *dtb;
144
145#if FULL_SYSTEM
146 Addr dbg_vtophys(Addr addr);
147#endif
148
149 union Result {
150 uint64_t integer;
151 float fp;
152 double dbl;
153 };
154
155 Result result;
156
157 // current instruction
158 MachInst machInst;
159

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264 break;
265 };
266 }
267
268 void setFloatReg(const StaticInst *si, int idx, FloatReg val)
269 {
270 int reg_idx = si->destRegIdx(idx) - TheISA::FP_Base_DepTag;
271 thread->setFloatReg(reg_idx, val);
272 result.fp = val;
273 }
274
275 void setFloatRegBits(const StaticInst *si, int idx, FloatRegBits val,
276 int width)
277 {
278 int reg_idx = si->destRegIdx(idx) - TheISA::FP_Base_DepTag;
279 thread->setFloatRegBits(reg_idx, val, width);
280 result.integer = val;

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313 }
314
315 Fault setMiscRegWithEffect(int misc_reg, const MiscReg &val)
316 {
317 miscRegIdxs.push(misc_reg);
318 return thread->setMiscRegWithEffect(misc_reg, val);
319 }
320
321 void recordPCChange(uint64_t val) { changedPC = true; }
322 void recordNextPCChange(uint64_t val) { changedNextPC = true; }
323
324 bool translateInstReq(Request *req);
325 void translateDataWriteReq(Request *req);
326 void translateDataReadReq(Request *req);
327
328#if FULL_SYSTEM
329 Fault hwrei() { return thread->hwrei(); }

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355 Request *unverifiedReq;
356 uint8_t *unverifiedMemData;
357
358 bool changedPC;
359 bool willChangePC;
360 uint64_t newPC;
361 bool changedNextPC;
362 bool exitOnError;
363 bool warnOnlyOnLoadError;
364
365 InstSeqNum youngestSN;
366};
367
368/**
369 * Templated Checker class. This Checker class is templated on the
370 * DynInstPtr of the instruction type that will be verified. Proper
371 * template instantiations of the Checker must be placed at the bottom
372 * of checker/cpu.cc.
373 */
374template <class DynInstPtr>
375class Checker : public CheckerCPU
376{
377 public:
378 Checker(Params *p)
379 : CheckerCPU(p)
380 { }
381
382 void switchOut();
383 void takeOverFrom(BaseCPU *oldCPU);
384
385 void verify(DynInstPtr &inst);
386
387 void validateInst(DynInstPtr &inst);
388 void validateExecution(DynInstPtr &inst);
389 void validateState();
390
391 void copyResult(DynInstPtr &inst);
392
393 private:
394 void handleError(DynInstPtr &inst)
395 {
396 if (exitOnError)
397 dumpAndExit(inst);
398 }
399
400 void dumpAndExit(DynInstPtr &inst);
401
402 std::list<DynInstPtr> instList;
403 typedef typename std::list<DynInstPtr>::iterator InstListIt;
404 void dumpInsts();
405};
406
407#endif // __CPU_CHECKER_CPU_HH__