1/*
2 * Copyright (c) 2011, 2016 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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392 const VecElem val) override
393 {
394 const RegId& reg = si->destRegIdx(idx);
395 assert(reg.isVecElem());
396 thread->setVecElem(reg, val);
397 setVecElemResult(val);
398 }
399
400 bool readPredicate() override { return thread->readPredicate(); }
401 void setPredicate(bool val) override
402 {
403 thread->setPredicate(val);
404 }
405
406 TheISA::PCState pcState() const override { return thread->pcState(); }
407 void pcState(const TheISA::PCState &val) override
408 {

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567 : CheckerCPU(p), updateThisCycle(false), unverifiedInst(NULL)
568 { }
569
570 void switchOut();
571 void takeOverFrom(BaseCPU *oldCPU);
572
573 void advancePC(const Fault &fault);
574
575 void verify(DynInstPtr &inst);
576
577 void validateInst(DynInstPtr &inst);
578 void validateExecution(DynInstPtr &inst);
579 void validateState();
580
581 void copyResult(DynInstPtr &inst, const InstResult& mismatch_val,
582 int start_idx);
583 void handlePendingInt();
584
585 private:
586 void handleError(DynInstPtr &inst)
587 {
588 if (exitOnError) {
589 dumpAndExit(inst);
590 } else if (updateOnError) {
591 updateThisCycle = true;
592 }
593 }
594
595 void dumpAndExit(DynInstPtr &inst);
596
597 bool updateThisCycle;
598
599 DynInstPtr unverifiedInst;
600
601 std::list<DynInstPtr> instList;
602 typedef typename std::list<DynInstPtr>::iterator InstListIt;
603 void dumpInsts();
604};
605
606#endif // __CPU_CHECKER_CPU_HH__