base.cc (9157:e0bad9d7bbd6) base.cc (9178:6a0ff1770e6e)
1/*
2 * Copyright (c) 2011-2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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384 */
385
386 MasterPort *old_itb_port = oldTC->getITBPtr()->getMasterPort();
387 MasterPort *old_dtb_port = oldTC->getDTBPtr()->getMasterPort();
388 MasterPort *new_itb_port = newTC->getITBPtr()->getMasterPort();
389 MasterPort *new_dtb_port = newTC->getDTBPtr()->getMasterPort();
390
391 // Move over any table walker ports if they exist
1/*
2 * Copyright (c) 2011-2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 375 unchanged lines hidden (view full) ---

384 */
385
386 MasterPort *old_itb_port = oldTC->getITBPtr()->getMasterPort();
387 MasterPort *old_dtb_port = oldTC->getDTBPtr()->getMasterPort();
388 MasterPort *new_itb_port = newTC->getITBPtr()->getMasterPort();
389 MasterPort *new_dtb_port = newTC->getDTBPtr()->getMasterPort();
390
391 // Move over any table walker ports if they exist
392 if (new_itb_port && !new_itb_port->isConnected()) {
392 if (new_itb_port) {
393 assert(!new_itb_port->isConnected());
393 assert(old_itb_port);
394 assert(old_itb_port);
395 assert(old_itb_port->isConnected());
394 SlavePort &slavePort = old_itb_port->getSlavePort();
396 SlavePort &slavePort = old_itb_port->getSlavePort();
397 old_itb_port->unbind();
395 new_itb_port->bind(slavePort);
398 new_itb_port->bind(slavePort);
396 old_itb_port->unBind();
397 }
399 }
398 if (new_dtb_port && !new_dtb_port->isConnected()) {
400 if (new_dtb_port) {
401 assert(!new_dtb_port->isConnected());
399 assert(old_dtb_port);
402 assert(old_dtb_port);
403 assert(old_dtb_port->isConnected());
400 SlavePort &slavePort = old_dtb_port->getSlavePort();
404 SlavePort &slavePort = old_dtb_port->getSlavePort();
405 old_dtb_port->unbind();
401 new_dtb_port->bind(slavePort);
406 new_dtb_port->bind(slavePort);
402 old_dtb_port->unBind();
403 }
404
405 // Checker whether or not we have to transfer CheckerCPU
406 // objects over in the switch
407 CheckerCPU *oldChecker = oldTC->getCheckerCpuPtr();
408 CheckerCPU *newChecker = newTC->getCheckerCpuPtr();
409 if (oldChecker && newChecker) {
410 MasterPort *old_checker_itb_port =
411 oldChecker->getITBPtr()->getMasterPort();
412 MasterPort *old_checker_dtb_port =
413 oldChecker->getDTBPtr()->getMasterPort();
414 MasterPort *new_checker_itb_port =
415 newChecker->getITBPtr()->getMasterPort();
416 MasterPort *new_checker_dtb_port =
417 newChecker->getDTBPtr()->getMasterPort();
418
419 // Move over any table walker ports if they exist for checker
407 }
408
409 // Checker whether or not we have to transfer CheckerCPU
410 // objects over in the switch
411 CheckerCPU *oldChecker = oldTC->getCheckerCpuPtr();
412 CheckerCPU *newChecker = newTC->getCheckerCpuPtr();
413 if (oldChecker && newChecker) {
414 MasterPort *old_checker_itb_port =
415 oldChecker->getITBPtr()->getMasterPort();
416 MasterPort *old_checker_dtb_port =
417 oldChecker->getDTBPtr()->getMasterPort();
418 MasterPort *new_checker_itb_port =
419 newChecker->getITBPtr()->getMasterPort();
420 MasterPort *new_checker_dtb_port =
421 newChecker->getDTBPtr()->getMasterPort();
422
423 // Move over any table walker ports if they exist for checker
420 if (new_checker_itb_port && !new_checker_itb_port->isConnected()) {
424 if (new_checker_itb_port) {
425 assert(!new_checker_itb_port->isConnected());
421 assert(old_checker_itb_port);
426 assert(old_checker_itb_port);
422 SlavePort &slavePort = old_checker_itb_port->getSlavePort();;
427 assert(old_checker_itb_port->isConnected());
428 SlavePort &slavePort = old_checker_itb_port->getSlavePort();
429 old_checker_itb_port->unbind();
423 new_checker_itb_port->bind(slavePort);
430 new_checker_itb_port->bind(slavePort);
424 old_checker_itb_port->unBind();
425 }
431 }
426 if (new_checker_dtb_port && !new_checker_dtb_port->isConnected()) {
432 if (new_checker_dtb_port) {
433 assert(!new_checker_dtb_port->isConnected());
427 assert(old_checker_dtb_port);
434 assert(old_checker_dtb_port);
428 SlavePort &slavePort = old_checker_dtb_port->getSlavePort();;
435 assert(old_checker_dtb_port->isConnected());
436 SlavePort &slavePort = old_checker_dtb_port->getSlavePort();
437 old_checker_dtb_port->unbind();
429 new_checker_dtb_port->bind(slavePort);
438 new_checker_dtb_port->bind(slavePort);
430 old_checker_dtb_port->unBind();
431 }
432 }
433 }
434
435 interrupts = oldCPU->interrupts;
436 interrupts->setCPU(this);
437 oldCPU->interrupts = NULL;
438
439 if (FullSystem) {
440 for (ThreadID i = 0; i < size; ++i)
441 threadContexts[i]->profileClear();
442
443 if (profileEvent)
444 schedule(profileEvent, curTick());
445 }
446
439 }
440 }
441 }
442
443 interrupts = oldCPU->interrupts;
444 interrupts->setCPU(this);
445 oldCPU->interrupts = NULL;
446
447 if (FullSystem) {
448 for (ThreadID i = 0; i < size; ++i)
449 threadContexts[i]->profileClear();
450
451 if (profileEvent)
452 schedule(profileEvent, curTick());
453 }
454
447 // Connect new CPU to old CPU's memory only if new CPU isn't
448 // connected to anything. Also connect old CPU's memory to new
449 // CPU.
450 if (!getInstPort().isConnected()) {
451 getInstPort().bind(oldCPU->getInstPort().getSlavePort());
452 oldCPU->getInstPort().unBind();
453 }
455 // All CPUs have an instruction and a data port, and the new CPU's
456 // ports are dangling while the old CPU has its ports connected
457 // already. Unbind the old CPU and then bind the ports of the one
458 // we are switching to.
459 assert(!getInstPort().isConnected());
460 assert(oldCPU->getInstPort().isConnected());
461 SlavePort &inst_peer_port = oldCPU->getInstPort().getSlavePort();
462 oldCPU->getInstPort().unbind();
463 getInstPort().bind(inst_peer_port);
454
464
455 if (!getDataPort().isConnected()) {
456 getDataPort().bind(oldCPU->getDataPort().getSlavePort());
457 oldCPU->getDataPort().unBind();
458 }
465 assert(!getDataPort().isConnected());
466 assert(oldCPU->getDataPort().isConnected());
467 SlavePort &data_peer_port = oldCPU->getDataPort().getSlavePort();
468 oldCPU->getDataPort().unbind();
469 getDataPort().bind(data_peer_port);
459}
460
461
462BaseCPU::ProfileEvent::ProfileEvent(BaseCPU *_cpu, Tick _interval)
463 : cpu(_cpu), interval(_interval)
464{ }
465
466void

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471
472
473BaseCPU::ProfileEvent::ProfileEvent(BaseCPU *_cpu, Tick _interval)
474 : cpu(_cpu), interval(_interval)
475{ }
476
477void

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