base.cc (8745:575cab0db076) base.cc (8779:2a590c51adb1)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * Copyright (c) 2011 Regents of the University of California
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

--- 33 unchanged lines hidden (view full) ---

42#include "base/output.hh"
43#include "base/trace.hh"
44#include "cpu/base.hh"
45#include "cpu/cpuevent.hh"
46#include "cpu/profile.hh"
47#include "cpu/thread_context.hh"
48#include "debug/SyscallVerbose.hh"
49#include "params/BaseCPU.hh"
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * Copyright (c) 2011 Regents of the University of California
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

--- 33 unchanged lines hidden (view full) ---

42#include "base/output.hh"
43#include "base/trace.hh"
44#include "cpu/base.hh"
45#include "cpu/cpuevent.hh"
46#include "cpu/profile.hh"
47#include "cpu/thread_context.hh"
48#include "debug/SyscallVerbose.hh"
49#include "params/BaseCPU.hh"
50#include "sim/full_system.hh"
50#include "sim/process.hh"
51#include "sim/sim_events.hh"
52#include "sim/sim_exit.hh"
53#include "sim/system.hh"
54
55// Hack
56#include "sim/stat_control.hh"
57

--- 134 unchanged lines hidden (view full) ---

192 } else {
193 typedef EventWrapper<BaseCPU, &BaseCPU::enableFunctionTrace> wrap;
194 Event *event = new wrap(this, true);
195 schedule(event, p->function_trace_start);
196 }
197 }
198 interrupts->setCPU(this);
199
51#include "sim/process.hh"
52#include "sim/sim_events.hh"
53#include "sim/sim_exit.hh"
54#include "sim/system.hh"
55
56// Hack
57#include "sim/stat_control.hh"
58

--- 134 unchanged lines hidden (view full) ---

193 } else {
194 typedef EventWrapper<BaseCPU, &BaseCPU::enableFunctionTrace> wrap;
195 Event *event = new wrap(this, true);
196 schedule(event, p->function_trace_start);
197 }
198 }
199 interrupts->setCPU(this);
200
201 if (FullSystem) {
200#if FULL_SYSTEM
202#if FULL_SYSTEM
201 profileEvent = NULL;
202 if (params()->profile)
203 profileEvent = new ProfileEvent(this, params()->profile);
203 profileEvent = NULL;
204 if (params()->profile)
205 profileEvent = new ProfileEvent(this, params()->profile);
204#endif
206#endif
207 }
205 tracer = params()->tracer;
206}
207
208void
209BaseCPU::enableFunctionTrace()
210{
211 functionTracingEnabled = true;
212}

--- 7 unchanged lines hidden (view full) ---

220{
221 if (!params()->defer_registration)
222 registerThreadContexts();
223}
224
225void
226BaseCPU::startup()
227{
208 tracer = params()->tracer;
209}
210
211void
212BaseCPU::enableFunctionTrace()
213{
214 functionTracingEnabled = true;
215}

--- 7 unchanged lines hidden (view full) ---

223{
224 if (!params()->defer_registration)
225 registerThreadContexts();
226}
227
228void
229BaseCPU::startup()
230{
228#if FULL_SYSTEM
229 if (!params()->defer_registration && profileEvent)
230 schedule(profileEvent, curTick());
231#endif
231 if (FullSystem) {
232 if (!params()->defer_registration && profileEvent)
233 schedule(profileEvent, curTick());
234 }
232
233 if (params()->progress_interval) {
234 Tick num_ticks = ticks(params()->progress_interval);
235
236 Event *event;
237 event = new CPUProgressEvent(this, num_ticks);
238 }
239}

--- 23 unchanged lines hidden (view full) ---

263 if (size > 1) {
264 for (int i = 0; i < size; ++i) {
265 stringstream namestr;
266 ccprintf(namestr, "%s.ctx%d", name(), i);
267 threadContexts[i]->regStats(namestr.str());
268 }
269 } else if (size == 1)
270 threadContexts[0]->regStats(name());
235
236 if (params()->progress_interval) {
237 Tick num_ticks = ticks(params()->progress_interval);
238
239 Event *event;
240 event = new CPUProgressEvent(this, num_ticks);
241 }
242}

--- 23 unchanged lines hidden (view full) ---

266 if (size > 1) {
267 for (int i = 0; i < size; ++i) {
268 stringstream namestr;
269 ccprintf(namestr, "%s.ctx%d", name(), i);
270 threadContexts[i]->regStats(namestr.str());
271 }
272 } else if (size == 1)
273 threadContexts[0]->regStats(name());
271
272#if FULL_SYSTEM
273#endif
274}
275
276Tick
277BaseCPU::nextCycle()
278{
279 Tick next_tick = curTick() - phase + clock - 1;
280 next_tick -= (next_tick % clock);
281 next_tick += phase;

--- 25 unchanged lines hidden (view full) ---

307 * example. We may even want to do something like this for SMT so that
308 * cpu 0 has the lowest thread contexts and cpu N has the highest, but
309 * I'll just do this for now
310 */
311 if (numThreads == 1)
312 tc->setContextId(system->registerThreadContext(tc, _cpuId));
313 else
314 tc->setContextId(system->registerThreadContext(tc));
274}
275
276Tick
277BaseCPU::nextCycle()
278{
279 Tick next_tick = curTick() - phase + clock - 1;
280 next_tick -= (next_tick % clock);
281 next_tick += phase;

--- 25 unchanged lines hidden (view full) ---

307 * example. We may even want to do something like this for SMT so that
308 * cpu 0 has the lowest thread contexts and cpu N has the highest, but
309 * I'll just do this for now
310 */
311 if (numThreads == 1)
312 tc->setContextId(system->registerThreadContext(tc, _cpuId));
313 else
314 tc->setContextId(system->registerThreadContext(tc));
315#if !FULL_SYSTEM
316 tc->getProcessPtr()->assignThreadContext(tc->contextId());
317#endif
315
316 if (!FullSystem)
317 tc->getProcessPtr()->assignThreadContext(tc->contextId());
318 }
319}
320
321
322int
323BaseCPU::findContext(ThreadContext *tc)
324{
325 ThreadID size = threadContexts.size();
326 for (ThreadID tid = 0; tid < size; ++tid) {
327 if (tc == threadContexts[tid])
328 return tid;
329 }
330 return 0;
331}
332
333void
334BaseCPU::switchOut()
335{
318 }
319}
320
321
322int
323BaseCPU::findContext(ThreadContext *tc)
324{
325 ThreadID size = threadContexts.size();
326 for (ThreadID tid = 0; tid < size; ++tid) {
327 if (tc == threadContexts[tid])
328 return tid;
329 }
330 return 0;
331}
332
333void
334BaseCPU::switchOut()
335{
336// panic("This CPU doesn't support sampling!");
337#if FULL_SYSTEM
338 if (profileEvent && profileEvent->scheduled())
339 deschedule(profileEvent);
336 if (profileEvent && profileEvent->scheduled())
337 deschedule(profileEvent);
340#endif
341}
342
343void
344BaseCPU::takeOverFrom(BaseCPU *oldCPU, Port *ic, Port *dc)
345{
346 assert(threadContexts.size() == oldCPU->threadContexts.size());
347
348 _cpuId = oldCPU->cpuId();

--- 37 unchanged lines hidden (view full) ---

386 new_dtb_port->setPeer(peer);
387 peer->setPeer(new_dtb_port);
388 }
389 }
390
391 interrupts = oldCPU->interrupts;
392 interrupts->setCPU(this);
393
338}
339
340void
341BaseCPU::takeOverFrom(BaseCPU *oldCPU, Port *ic, Port *dc)
342{
343 assert(threadContexts.size() == oldCPU->threadContexts.size());
344
345 _cpuId = oldCPU->cpuId();

--- 37 unchanged lines hidden (view full) ---

383 new_dtb_port->setPeer(peer);
384 peer->setPeer(new_dtb_port);
385 }
386 }
387
388 interrupts = oldCPU->interrupts;
389 interrupts->setCPU(this);
390
394#if FULL_SYSTEM
395 for (ThreadID i = 0; i < size; ++i)
396 threadContexts[i]->profileClear();
391 if (FullSystem) {
392 for (ThreadID i = 0; i < size; ++i)
393 threadContexts[i]->profileClear();
397
394
398 if (profileEvent)
399 schedule(profileEvent, curTick());
400#endif
395 if (profileEvent)
396 schedule(profileEvent, curTick());
397 }
401
402 // Connect new CPU to old CPU's memory only if new CPU isn't
403 // connected to anything. Also connect old CPU's memory to new
404 // CPU.
405 if (!ic->isConnected()) {
406 Port *peer = oldCPU->getPort("icache_port")->getPeer();
407 ic->setPeer(peer);
408 peer->setPeer(ic);
409 }
410
411 if (!dc->isConnected()) {
412 Port *peer = oldCPU->getPort("dcache_port")->getPeer();
413 dc->setPeer(peer);
414 peer->setPeer(dc);
415 }
416}
417
418
398
399 // Connect new CPU to old CPU's memory only if new CPU isn't
400 // connected to anything. Also connect old CPU's memory to new
401 // CPU.
402 if (!ic->isConnected()) {
403 Port *peer = oldCPU->getPort("icache_port")->getPeer();
404 ic->setPeer(peer);
405 peer->setPeer(ic);
406 }
407
408 if (!dc->isConnected()) {
409 Port *peer = oldCPU->getPort("dcache_port")->getPeer();
410 dc->setPeer(peer);
411 peer->setPeer(dc);
412 }
413}
414
415
419#if FULL_SYSTEM
420BaseCPU::ProfileEvent::ProfileEvent(BaseCPU *_cpu, Tick _interval)
421 : cpu(_cpu), interval(_interval)
422{ }
423
424void
425BaseCPU::ProfileEvent::process()
426{
427 ThreadID size = cpu->threadContexts.size();
428 for (ThreadID i = 0; i < size; ++i) {
429 ThreadContext *tc = cpu->threadContexts[i];
430 tc->profileSample();
431 }
432
433 cpu->schedule(this, curTick() + interval);
434}
435
416BaseCPU::ProfileEvent::ProfileEvent(BaseCPU *_cpu, Tick _interval)
417 : cpu(_cpu), interval(_interval)
418{ }
419
420void
421BaseCPU::ProfileEvent::process()
422{
423 ThreadID size = cpu->threadContexts.size();
424 for (ThreadID i = 0; i < size; ++i) {
425 ThreadContext *tc = cpu->threadContexts[i];
426 tc->profileSample();
427 }
428
429 cpu->schedule(this, curTick() + interval);
430}
431
436#endif // FULL_SYSTEM
437
438void
439BaseCPU::serialize(std::ostream &os)
440{
441 SERIALIZE_SCALAR(instCnt);
442 interrupts->serialize(os);
443}
444
445void

--- 32 unchanged lines hidden --- 		432void
433BaseCPU::serialize(std::ostream &os)
434{
435 SERIALIZE_SCALAR(instCnt);
436 interrupts->serialize(os);
437}
438
439void

--- 32 unchanged lines hidden ---