base.cc (12334:e0ab29a34764) base.cc (12406:86bde4a026b5)
1/*
2 * Copyright (c) 2011-2012,2016-2017 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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46 */
47
48#include "cpu/base.hh"
49
50#include <iostream>
51#include <sstream>
52#include <string>
53
1/*
2 * Copyright (c) 2011-2012,2016-2017 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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46 */
47
48#include "cpu/base.hh"
49
50#include <iostream>
51#include <sstream>
52#include <string>
53
54#include "arch/tlb.hh"
54#include "arch/generic/tlb.hh"
55#include "base/cprintf.hh"
56#include "base/loader/symtab.hh"
57#include "base/logging.hh"
58#include "base/output.hh"
59#include "base/trace.hh"
60#include "cpu/checker/cpu.hh"
61#include "cpu/cpuevent.hh"
62#include "cpu/profile.hh"

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308 return true;
309 } else {
310 monitor.gotWakeup = false;
311 return false;
312 }
313}
314
315void
55#include "base/cprintf.hh"
56#include "base/loader/symtab.hh"
57#include "base/logging.hh"
58#include "base/output.hh"
59#include "base/trace.hh"
60#include "cpu/checker/cpu.hh"
61#include "cpu/cpuevent.hh"
62#include "cpu/profile.hh"

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308 return true;
309 } else {
310 monitor.gotWakeup = false;
311 return false;
312 }
313}
314
315void
316BaseCPU::mwaitAtomic(ThreadID tid, ThreadContext *tc, TheISA::TLB *dtb)
316BaseCPU::mwaitAtomic(ThreadID tid, ThreadContext *tc, BaseTLB *dtb)
317{
318 assert(tid < numThreads);
319 AddressMonitor &monitor = addressMonitor[tid];
320
321 Request req;
322 Addr addr = monitor.vAddr;
323 int block_size = cacheLineSize();
324 uint64_t mask = ~((uint64_t)(block_size - 1));

--- 534 unchanged lines hidden --- 		317{
318 assert(tid < numThreads);
319 AddressMonitor &monitor = addressMonitor[tid];
320
321 Request req;
322 Addr addr = monitor.vAddr;
323 int block_size = cacheLineSize();
324 uint64_t mask = ~((uint64_t)(block_size - 1));

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