1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * Copyright (c) 2011 Regents of the University of California
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;
10 * redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution;
13 * neither the name of the copyright holders nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * Authors: Steve Reinhardt
30 * Nathan Binkert
31 * Rick Strong
32 */
33
34#include <iostream>
35#include <sstream>
36#include <string>
37
38#include "arch/tlb.hh"
39#include "base/loader/symtab.hh"
40#include "base/cprintf.hh"
41#include "base/misc.hh"
42#include "base/output.hh"
43#include "base/trace.hh"
44#include "cpu/base.hh"
45#include "cpu/cpuevent.hh"
46#include "cpu/profile.hh"
47#include "cpu/thread_context.hh"
48#include "debug/SyscallVerbose.hh"
49#include "params/BaseCPU.hh"
50#include "sim/process.hh"
51#include "sim/sim_events.hh"
52#include "sim/sim_exit.hh"
53#include "sim/system.hh"
54
55// Hack
56#include "sim/stat_control.hh"
57
58using namespace std;
59
60vector<BaseCPU *> BaseCPU::cpuList;
61
62// This variable reflects the max number of threads in any CPU. Be
63// careful to only use it once all the CPUs that you care about have
64// been initialized
65int maxThreadsPerCPU = 1;
66
67CPUProgressEvent::CPUProgressEvent(BaseCPU *_cpu, Tick ival)
68 : Event(Event::Progress_Event_Pri), _interval(ival), lastNumInst(0),
69 cpu(_cpu), _repeatEvent(true)
70{
71 if (_interval)
72 cpu->schedule(this, curTick() + _interval);
73}
74
75void
76CPUProgressEvent::process()
77{
78 Counter temp = cpu->totalInstructions();
79#ifndef NDEBUG
80 double ipc = double(temp - lastNumInst) / (_interval / cpu->ticks(1));
81
82 DPRINTFN("%s progress event, total committed:%i, progress insts committed: "
83 "%lli, IPC: %0.8d\n", cpu->name(), temp, temp - lastNumInst,
84 ipc);
85 ipc = 0.0;
86#else
87 cprintf("%lli: %s progress event, total committed:%i, progress insts "
88 "committed: %lli\n", curTick(), cpu->name(), temp,
89 temp - lastNumInst);
90#endif
91 lastNumInst = temp;
92
93 if (_repeatEvent)
94 cpu->schedule(this, curTick() + _interval);
95}
96
97const char *
98CPUProgressEvent::description() const
99{
100 return "CPU Progress";
101}
102
103#if FULL_SYSTEM
104BaseCPU::BaseCPU(Params *p)
105 : MemObject(p), clock(p->clock), instCnt(0), _cpuId(p->cpu_id),
106 interrupts(p->interrupts),
107 numThreads(p->numThreads), system(p->system),
108 phase(p->phase)
109#else
110BaseCPU::BaseCPU(Params *p)
111 : MemObject(p), clock(p->clock), _cpuId(p->cpu_id),
112 numThreads(p->numThreads), system(p->system),
113 phase(p->phase)
114#endif
115{
116// currentTick = curTick();
117
118 // if Python did not provide a valid ID, do it here
119 if (_cpuId == -1 ) {
120 _cpuId = cpuList.size();
121 }
122
123 // add self to global list of CPUs
124 cpuList.push_back(this);
125
126 DPRINTF(SyscallVerbose, "Constructing CPU with id %d\n", _cpuId);
127
128 if (numThreads > maxThreadsPerCPU)
129 maxThreadsPerCPU = numThreads;
130
131 // allocate per-thread instruction-based event queues
132 comInstEventQueue = new EventQueue *[numThreads];
133 for (ThreadID tid = 0; tid < numThreads; ++tid)
134 comInstEventQueue[tid] =
135 new EventQueue("instruction-based event queue");
136
137 //
138 // set up instruction-count-based termination events, if any
139 //
140 if (p->max_insts_any_thread != 0) {
141 const char *cause = "a thread reached the max instruction count";
142 for (ThreadID tid = 0; tid < numThreads; ++tid) {
143 Event *event = new SimLoopExitEvent(cause, 0);
144 comInstEventQueue[tid]->schedule(event, p->max_insts_any_thread);
145 }
146 }
147
148 if (p->max_insts_all_threads != 0) {
149 const char *cause = "all threads reached the max instruction count";
150
151 // allocate & initialize shared downcounter: each event will
152 // decrement this when triggered; simulation will terminate
153 // when counter reaches 0
154 int *counter = new int;
155 *counter = numThreads;
156 for (ThreadID tid = 0; tid < numThreads; ++tid) {
157 Event *event = new CountedExitEvent(cause, *counter);
158 comInstEventQueue[tid]->schedule(event, p->max_insts_all_threads);
159 }
160 }
161
162 // allocate per-thread load-based event queues
163 comLoadEventQueue = new EventQueue *[numThreads];
164 for (ThreadID tid = 0; tid < numThreads; ++tid)
165 comLoadEventQueue[tid] = new EventQueue("load-based event queue");
166
167 //
168 // set up instruction-count-based termination events, if any
169 //
170 if (p->max_loads_any_thread != 0) {
171 const char *cause = "a thread reached the max load count";
172 for (ThreadID tid = 0; tid < numThreads; ++tid) {
173 Event *event = new SimLoopExitEvent(cause, 0);
174 comLoadEventQueue[tid]->schedule(event, p->max_loads_any_thread);
175 }
176 }
177
178 if (p->max_loads_all_threads != 0) {
179 const char *cause = "all threads reached the max load count";
180 // allocate & initialize shared downcounter: each event will
181 // decrement this when triggered; simulation will terminate
182 // when counter reaches 0
183 int *counter = new int;
184 *counter = numThreads;
185 for (ThreadID tid = 0; tid < numThreads; ++tid) {
186 Event *event = new CountedExitEvent(cause, *counter);
187 comLoadEventQueue[tid]->schedule(event, p->max_loads_all_threads);
188 }
189 }
190
191 functionTracingEnabled = false;
192 if (p->function_trace) {
193 functionTraceStream = simout.find(csprintf("ftrace.%s", name()));
194 currentFunctionStart = currentFunctionEnd = 0;
195 functionEntryTick = p->function_trace_start;
196
197 if (p->function_trace_start == 0) {
198 functionTracingEnabled = true;
199 } else {
200 typedef EventWrapper<BaseCPU, &BaseCPU::enableFunctionTrace> wrap;
201 Event *event = new wrap(this, true);
202 schedule(event, p->function_trace_start);
203 }
204 }
205#if FULL_SYSTEM
206 interrupts->setCPU(this);
207
208 profileEvent = NULL;
209 if (params()->profile)
210 profileEvent = new ProfileEvent(this, params()->profile);
211#endif
212 tracer = params()->tracer;
213}
214
215void
216BaseCPU::enableFunctionTrace()
217{
218 functionTracingEnabled = true;
219}
220
221BaseCPU::~BaseCPU()
222{
223}
224
225void
226BaseCPU::init()
227{
228 if (!params()->defer_registration)
229 registerThreadContexts();
230}
231
232void
233BaseCPU::startup()
234{
235#if FULL_SYSTEM
236 if (!params()->defer_registration && profileEvent)
237 schedule(profileEvent, curTick());
238#endif
239
240 if (params()->progress_interval) {
241 Tick num_ticks = ticks(params()->progress_interval);
242
243 Event *event;
244 event = new CPUProgressEvent(this, num_ticks);
245 }
246}
247
248
249void
250BaseCPU::regStats()
251{
252 using namespace Stats;
253
254 numCycles
255 .name(name() + ".numCycles")
256 .desc("number of cpu cycles simulated")
257 ;
258
259 numWorkItemsStarted
260 .name(name() + ".numWorkItemsStarted")
261 .desc("number of work items this cpu started")
262 ;
263
264 numWorkItemsCompleted
265 .name(name() + ".numWorkItemsCompleted")
266 .desc("number of work items this cpu completed")
267 ;
268
269 int size = threadContexts.size();
270 if (size > 1) {
271 for (int i = 0; i < size; ++i) {
272 stringstream namestr;
273 ccprintf(namestr, "%s.ctx%d", name(), i);
274 threadContexts[i]->regStats(namestr.str());
275 }
276 } else if (size == 1)
277 threadContexts[0]->regStats(name());
278
279#if FULL_SYSTEM
280#endif
281}
282
283Tick
284BaseCPU::nextCycle()
285{
286 Tick next_tick = curTick() - phase + clock - 1;
287 next_tick -= (next_tick % clock);
288 next_tick += phase;
289 return next_tick;
290}
291
292Tick
293BaseCPU::nextCycle(Tick begin_tick)
294{
295 Tick next_tick = begin_tick;
296 if (next_tick % clock != 0)
297 next_tick = next_tick - (next_tick % clock) + clock;
298 next_tick += phase;
299
300 assert(next_tick >= curTick());
301 return next_tick;
302}
303
304void
305BaseCPU::registerThreadContexts()
306{
307 ThreadID size = threadContexts.size();
308 for (ThreadID tid = 0; tid < size; ++tid) {
309 ThreadContext *tc = threadContexts[tid];
310
311 /** This is so that contextId and cpuId match where there is a
312 * 1cpu:1context relationship. Otherwise, the order of registration
313 * could affect the assignment and cpu 1 could have context id 3, for
314 * example. We may even want to do something like this for SMT so that
315 * cpu 0 has the lowest thread contexts and cpu N has the highest, but
316 * I'll just do this for now
317 */
318 if (numThreads == 1)
319 tc->setContextId(system->registerThreadContext(tc, _cpuId));
320 else
321 tc->setContextId(system->registerThreadContext(tc));
322#if !FULL_SYSTEM
323 tc->getProcessPtr()->assignThreadContext(tc->contextId());
324#endif
325 }
326}
327
328
329int
330BaseCPU::findContext(ThreadContext *tc)
331{
332 ThreadID size = threadContexts.size();
333 for (ThreadID tid = 0; tid < size; ++tid) {
334 if (tc == threadContexts[tid])
335 return tid;
336 }
337 return 0;
338}
339
340void
341BaseCPU::switchOut()
342{
343// panic("This CPU doesn't support sampling!");
344#if FULL_SYSTEM
345 if (profileEvent && profileEvent->scheduled())
346 deschedule(profileEvent);
347#endif
348}
349
350void
351BaseCPU::takeOverFrom(BaseCPU *oldCPU, Port *ic, Port *dc)
352{
353 assert(threadContexts.size() == oldCPU->threadContexts.size());
354
355 _cpuId = oldCPU->cpuId();
356
357 ThreadID size = threadContexts.size();
358 for (ThreadID i = 0; i < size; ++i) {
359 ThreadContext *newTC = threadContexts[i];
360 ThreadContext *oldTC = oldCPU->threadContexts[i];
361
362 newTC->takeOverFrom(oldTC);
363
364 CpuEvent::replaceThreadContext(oldTC, newTC);
365
366 assert(newTC->contextId() == oldTC->contextId());
367 assert(newTC->threadId() == oldTC->threadId());
368 system->replaceThreadContext(newTC, newTC->contextId());
369
370 /* This code no longer works since the zero register (e.g.,
371 * r31 on Alpha) doesn't necessarily contain zero at this
372 * point.
373 if (DTRACE(Context))
374 ThreadContext::compare(oldTC, newTC);
375 */
376
377 Port *old_itb_port, *old_dtb_port, *new_itb_port, *new_dtb_port;
378 old_itb_port = oldTC->getITBPtr()->getPort();
379 old_dtb_port = oldTC->getDTBPtr()->getPort();
380 new_itb_port = newTC->getITBPtr()->getPort();
381 new_dtb_port = newTC->getDTBPtr()->getPort();
382
383 // Move over any table walker ports if they exist
384 if (new_itb_port && !new_itb_port->isConnected()) {
385 assert(old_itb_port);
386 Port *peer = old_itb_port->getPeer();;
387 new_itb_port->setPeer(peer);
388 peer->setPeer(new_itb_port);
389 }
390 if (new_dtb_port && !new_dtb_port->isConnected()) {
391 assert(old_dtb_port);
392 Port *peer = old_dtb_port->getPeer();;
393 new_dtb_port->setPeer(peer);
394 peer->setPeer(new_dtb_port);
395 }
396 }
397
398#if FULL_SYSTEM
399 interrupts = oldCPU->interrupts;
400 interrupts->setCPU(this);
401
402 for (ThreadID i = 0; i < size; ++i)
403 threadContexts[i]->profileClear();
404
405 if (profileEvent)
406 schedule(profileEvent, curTick());
407#endif
408
409 // Connect new CPU to old CPU's memory only if new CPU isn't
410 // connected to anything. Also connect old CPU's memory to new
411 // CPU.
412 if (!ic->isConnected()) {
413 Port *peer = oldCPU->getPort("icache_port")->getPeer();
414 ic->setPeer(peer);
415 peer->setPeer(ic);
416 }
417
418 if (!dc->isConnected()) {
419 Port *peer = oldCPU->getPort("dcache_port")->getPeer();
420 dc->setPeer(peer);
421 peer->setPeer(dc);
422 }
423}
424
425
426#if FULL_SYSTEM
427BaseCPU::ProfileEvent::ProfileEvent(BaseCPU *_cpu, Tick _interval)
428 : cpu(_cpu), interval(_interval)
429{ }
430
431void
432BaseCPU::ProfileEvent::process()
433{
434 ThreadID size = cpu->threadContexts.size();
435 for (ThreadID i = 0; i < size; ++i) {
436 ThreadContext *tc = cpu->threadContexts[i];
437 tc->profileSample();
438 }
439
440 cpu->schedule(this, curTick() + interval);
441}
442
443void
444BaseCPU::serialize(std::ostream &os)
445{
446 SERIALIZE_SCALAR(instCnt);
447 interrupts->serialize(os);
448}
449
450void
451BaseCPU::unserialize(Checkpoint *cp, const std::string &section)
452{
453 UNSERIALIZE_SCALAR(instCnt);
454 interrupts->unserialize(cp, section);
455}
456
457#endif // FULL_SYSTEM
458
459void
460BaseCPU::traceFunctionsInternal(Addr pc)
461{
462 if (!debugSymbolTable)
463 return;
464
465 // if pc enters different function, print new function symbol and
466 // update saved range. Otherwise do nothing.
467 if (pc < currentFunctionStart || pc >= currentFunctionEnd) {
468 string sym_str;
469 bool found = debugSymbolTable->findNearestSymbol(pc, sym_str,
470 currentFunctionStart,
471 currentFunctionEnd);
472
473 if (!found) {
474 // no symbol found: use addr as label
475 sym_str = csprintf("0x%x", pc);
476 currentFunctionStart = pc;
477 currentFunctionEnd = pc + 1;
478 }
479
480 ccprintf(*functionTraceStream, " (%d)\n%d: %s",
481 curTick() - functionEntryTick, curTick(), sym_str);
482 functionEntryTick = curTick();
483 }
484}