1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 365 unchanged lines hidden (view full) --- 374 ThreadContext *tc = cpu->threadContexts[i]; 375 tc->profileSample(); 376 } 377 378 cpu->schedule(this, curTick + interval); 379} 380 381void |
382BaseCPU::postInterrupt(int int_num, int index) |
383{ 384 interrupts->post(int_num, index); 385} 386 387void |
388BaseCPU::clearInterrupt(int int_num, int index) |
389{ 390 interrupts->clear(int_num, index); 391} 392 393void |
394BaseCPU::clearInterrupts() |
395{ |
396 interrupts->clearAll(); |
397} 398 399void 400BaseCPU::serialize(std::ostream &os) 401{ 402 SERIALIZE_SCALAR(instCnt); 403 interrupts->serialize(os); 404} --- 36 unchanged lines hidden --- |