1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Steve Reinhardt
29 * Nathan Binkert
30 */
31
32#include <iostream>
33#include <string>
34#include <sstream>
35
36#include "arch/tlb.hh"
37#include "base/cprintf.hh"
38#include "base/loader/symtab.hh"
39#include "base/misc.hh"
40#include "base/output.hh"
41#include "base/trace.hh"
42#include "cpu/base.hh"
43#include "cpu/cpuevent.hh"
44#include "cpu/thread_context.hh"
45#include "cpu/profile.hh"
46#include "params/BaseCPU.hh"
47#include "sim/sim_exit.hh"
48#include "sim/process.hh"
49#include "sim/sim_events.hh"
50#include "sim/system.hh"
51
52// Hack
53#include "sim/stat_control.hh"
54
55using namespace std;
56
57vector<BaseCPU *> BaseCPU::cpuList;
58
59// This variable reflects the max number of threads in any CPU. Be
60// careful to only use it once all the CPUs that you care about have
61// been initialized
62int maxThreadsPerCPU = 1;
63
64CPUProgressEvent::CPUProgressEvent(BaseCPU *_cpu, Tick ival)
65 : Event(Event::Progress_Event_Pri), _interval(ival), lastNumInst(0),
66 cpu(_cpu), _repeatEvent(true)
67{
68 if (_interval)
| 1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Steve Reinhardt
29 * Nathan Binkert
30 */
31
32#include <iostream>
33#include <string>
34#include <sstream>
35
36#include "arch/tlb.hh"
37#include "base/cprintf.hh"
38#include "base/loader/symtab.hh"
39#include "base/misc.hh"
40#include "base/output.hh"
41#include "base/trace.hh"
42#include "cpu/base.hh"
43#include "cpu/cpuevent.hh"
44#include "cpu/thread_context.hh"
45#include "cpu/profile.hh"
46#include "params/BaseCPU.hh"
47#include "sim/sim_exit.hh"
48#include "sim/process.hh"
49#include "sim/sim_events.hh"
50#include "sim/system.hh"
51
52// Hack
53#include "sim/stat_control.hh"
54
55using namespace std;
56
57vector<BaseCPU *> BaseCPU::cpuList;
58
59// This variable reflects the max number of threads in any CPU. Be
60// careful to only use it once all the CPUs that you care about have
61// been initialized
62int maxThreadsPerCPU = 1;
63
64CPUProgressEvent::CPUProgressEvent(BaseCPU *_cpu, Tick ival)
65 : Event(Event::Progress_Event_Pri), _interval(ival), lastNumInst(0),
66 cpu(_cpu), _repeatEvent(true)
67{
68 if (_interval)
|
69 cpu->schedule(this, curTick + _interval);
| 69 cpu->schedule(this, curTick() + _interval);
|
70}
71
72void
73CPUProgressEvent::process()
74{
75 Counter temp = cpu->totalInstructions();
76#ifndef NDEBUG
77 double ipc = double(temp - lastNumInst) / (_interval / cpu->ticks(1));
78
79 DPRINTFN("%s progress event, total committed:%i, progress insts committed: "
80 "%lli, IPC: %0.8d\n", cpu->name(), temp, temp - lastNumInst,
81 ipc);
82 ipc = 0.0;
83#else
84 cprintf("%lli: %s progress event, total committed:%i, progress insts "
| 70}
71
72void
73CPUProgressEvent::process()
74{
75 Counter temp = cpu->totalInstructions();
76#ifndef NDEBUG
77 double ipc = double(temp - lastNumInst) / (_interval / cpu->ticks(1));
78
79 DPRINTFN("%s progress event, total committed:%i, progress insts committed: "
80 "%lli, IPC: %0.8d\n", cpu->name(), temp, temp - lastNumInst,
81 ipc);
82 ipc = 0.0;
83#else
84 cprintf("%lli: %s progress event, total committed:%i, progress insts "
|
85 "committed: %lli\n", curTick, cpu->name(), temp,
| 85 "committed: %lli\n", curTick(), cpu->name(), temp,
|
86 temp - lastNumInst);
87#endif
88 lastNumInst = temp;
89
90 if (_repeatEvent)
| 86 temp - lastNumInst);
87#endif
88 lastNumInst = temp;
89
90 if (_repeatEvent)
|
91 cpu->schedule(this, curTick + _interval);
| 91 cpu->schedule(this, curTick() + _interval);
|
92}
93
94const char *
95CPUProgressEvent::description() const
96{
97 return "CPU Progress";
98}
99
100#if FULL_SYSTEM
101BaseCPU::BaseCPU(Params *p)
102 : MemObject(p), clock(p->clock), instCnt(0), _cpuId(p->cpu_id),
103 interrupts(p->interrupts),
104 numThreads(p->numThreads), system(p->system),
105 phase(p->phase)
106#else
107BaseCPU::BaseCPU(Params *p)
108 : MemObject(p), clock(p->clock), _cpuId(p->cpu_id),
109 numThreads(p->numThreads), system(p->system),
110 phase(p->phase)
111#endif
112{
| 92}
93
94const char *
95CPUProgressEvent::description() const
96{
97 return "CPU Progress";
98}
99
100#if FULL_SYSTEM
101BaseCPU::BaseCPU(Params *p)
102 : MemObject(p), clock(p->clock), instCnt(0), _cpuId(p->cpu_id),
103 interrupts(p->interrupts),
104 numThreads(p->numThreads), system(p->system),
105 phase(p->phase)
106#else
107BaseCPU::BaseCPU(Params *p)
108 : MemObject(p), clock(p->clock), _cpuId(p->cpu_id),
109 numThreads(p->numThreads), system(p->system),
110 phase(p->phase)
111#endif
112{
|
113// currentTick = curTick;
| 113// currentTick = curTick();
|
114
115 // if Python did not provide a valid ID, do it here
116 if (_cpuId == -1 ) {
117 _cpuId = cpuList.size();
118 }
119
120 // add self to global list of CPUs
121 cpuList.push_back(this);
122
123 DPRINTF(SyscallVerbose, "Constructing CPU with id %d\n", _cpuId);
124
125 if (numThreads > maxThreadsPerCPU)
126 maxThreadsPerCPU = numThreads;
127
128 // allocate per-thread instruction-based event queues
129 comInstEventQueue = new EventQueue *[numThreads];
130 for (ThreadID tid = 0; tid < numThreads; ++tid)
131 comInstEventQueue[tid] =
132 new EventQueue("instruction-based event queue");
133
134 //
135 // set up instruction-count-based termination events, if any
136 //
137 if (p->max_insts_any_thread != 0) {
138 const char *cause = "a thread reached the max instruction count";
139 for (ThreadID tid = 0; tid < numThreads; ++tid) {
140 Event *event = new SimLoopExitEvent(cause, 0);
141 comInstEventQueue[tid]->schedule(event, p->max_insts_any_thread);
142 }
143 }
144
145 if (p->max_insts_all_threads != 0) {
146 const char *cause = "all threads reached the max instruction count";
147
148 // allocate & initialize shared downcounter: each event will
149 // decrement this when triggered; simulation will terminate
150 // when counter reaches 0
151 int *counter = new int;
152 *counter = numThreads;
153 for (ThreadID tid = 0; tid < numThreads; ++tid) {
154 Event *event = new CountedExitEvent(cause, *counter);
155 comInstEventQueue[tid]->schedule(event, p->max_insts_all_threads);
156 }
157 }
158
159 // allocate per-thread load-based event queues
160 comLoadEventQueue = new EventQueue *[numThreads];
161 for (ThreadID tid = 0; tid < numThreads; ++tid)
162 comLoadEventQueue[tid] = new EventQueue("load-based event queue");
163
164 //
165 // set up instruction-count-based termination events, if any
166 //
167 if (p->max_loads_any_thread != 0) {
168 const char *cause = "a thread reached the max load count";
169 for (ThreadID tid = 0; tid < numThreads; ++tid) {
170 Event *event = new SimLoopExitEvent(cause, 0);
171 comLoadEventQueue[tid]->schedule(event, p->max_loads_any_thread);
172 }
173 }
174
175 if (p->max_loads_all_threads != 0) {
176 const char *cause = "all threads reached the max load count";
177 // allocate & initialize shared downcounter: each event will
178 // decrement this when triggered; simulation will terminate
179 // when counter reaches 0
180 int *counter = new int;
181 *counter = numThreads;
182 for (ThreadID tid = 0; tid < numThreads; ++tid) {
183 Event *event = new CountedExitEvent(cause, *counter);
184 comLoadEventQueue[tid]->schedule(event, p->max_loads_all_threads);
185 }
186 }
187
188 functionTracingEnabled = false;
189 if (p->function_trace) {
190 functionTraceStream = simout.find(csprintf("ftrace.%s", name()));
191 currentFunctionStart = currentFunctionEnd = 0;
192 functionEntryTick = p->function_trace_start;
193
194 if (p->function_trace_start == 0) {
195 functionTracingEnabled = true;
196 } else {
197 typedef EventWrapper<BaseCPU, &BaseCPU::enableFunctionTrace> wrap;
198 Event *event = new wrap(this, true);
199 schedule(event, p->function_trace_start);
200 }
201 }
202#if FULL_SYSTEM
203 interrupts->setCPU(this);
204
205 profileEvent = NULL;
206 if (params()->profile)
207 profileEvent = new ProfileEvent(this, params()->profile);
208#endif
209 tracer = params()->tracer;
210}
211
212void
213BaseCPU::enableFunctionTrace()
214{
215 functionTracingEnabled = true;
216}
217
218BaseCPU::~BaseCPU()
219{
220}
221
222void
223BaseCPU::init()
224{
225 if (!params()->defer_registration)
226 registerThreadContexts();
227}
228
229void
230BaseCPU::startup()
231{
232#if FULL_SYSTEM
233 if (!params()->defer_registration && profileEvent)
| 114
115 // if Python did not provide a valid ID, do it here
116 if (_cpuId == -1 ) {
117 _cpuId = cpuList.size();
118 }
119
120 // add self to global list of CPUs
121 cpuList.push_back(this);
122
123 DPRINTF(SyscallVerbose, "Constructing CPU with id %d\n", _cpuId);
124
125 if (numThreads > maxThreadsPerCPU)
126 maxThreadsPerCPU = numThreads;
127
128 // allocate per-thread instruction-based event queues
129 comInstEventQueue = new EventQueue *[numThreads];
130 for (ThreadID tid = 0; tid < numThreads; ++tid)
131 comInstEventQueue[tid] =
132 new EventQueue("instruction-based event queue");
133
134 //
135 // set up instruction-count-based termination events, if any
136 //
137 if (p->max_insts_any_thread != 0) {
138 const char *cause = "a thread reached the max instruction count";
139 for (ThreadID tid = 0; tid < numThreads; ++tid) {
140 Event *event = new SimLoopExitEvent(cause, 0);
141 comInstEventQueue[tid]->schedule(event, p->max_insts_any_thread);
142 }
143 }
144
145 if (p->max_insts_all_threads != 0) {
146 const char *cause = "all threads reached the max instruction count";
147
148 // allocate & initialize shared downcounter: each event will
149 // decrement this when triggered; simulation will terminate
150 // when counter reaches 0
151 int *counter = new int;
152 *counter = numThreads;
153 for (ThreadID tid = 0; tid < numThreads; ++tid) {
154 Event *event = new CountedExitEvent(cause, *counter);
155 comInstEventQueue[tid]->schedule(event, p->max_insts_all_threads);
156 }
157 }
158
159 // allocate per-thread load-based event queues
160 comLoadEventQueue = new EventQueue *[numThreads];
161 for (ThreadID tid = 0; tid < numThreads; ++tid)
162 comLoadEventQueue[tid] = new EventQueue("load-based event queue");
163
164 //
165 // set up instruction-count-based termination events, if any
166 //
167 if (p->max_loads_any_thread != 0) {
168 const char *cause = "a thread reached the max load count";
169 for (ThreadID tid = 0; tid < numThreads; ++tid) {
170 Event *event = new SimLoopExitEvent(cause, 0);
171 comLoadEventQueue[tid]->schedule(event, p->max_loads_any_thread);
172 }
173 }
174
175 if (p->max_loads_all_threads != 0) {
176 const char *cause = "all threads reached the max load count";
177 // allocate & initialize shared downcounter: each event will
178 // decrement this when triggered; simulation will terminate
179 // when counter reaches 0
180 int *counter = new int;
181 *counter = numThreads;
182 for (ThreadID tid = 0; tid < numThreads; ++tid) {
183 Event *event = new CountedExitEvent(cause, *counter);
184 comLoadEventQueue[tid]->schedule(event, p->max_loads_all_threads);
185 }
186 }
187
188 functionTracingEnabled = false;
189 if (p->function_trace) {
190 functionTraceStream = simout.find(csprintf("ftrace.%s", name()));
191 currentFunctionStart = currentFunctionEnd = 0;
192 functionEntryTick = p->function_trace_start;
193
194 if (p->function_trace_start == 0) {
195 functionTracingEnabled = true;
196 } else {
197 typedef EventWrapper<BaseCPU, &BaseCPU::enableFunctionTrace> wrap;
198 Event *event = new wrap(this, true);
199 schedule(event, p->function_trace_start);
200 }
201 }
202#if FULL_SYSTEM
203 interrupts->setCPU(this);
204
205 profileEvent = NULL;
206 if (params()->profile)
207 profileEvent = new ProfileEvent(this, params()->profile);
208#endif
209 tracer = params()->tracer;
210}
211
212void
213BaseCPU::enableFunctionTrace()
214{
215 functionTracingEnabled = true;
216}
217
218BaseCPU::~BaseCPU()
219{
220}
221
222void
223BaseCPU::init()
224{
225 if (!params()->defer_registration)
226 registerThreadContexts();
227}
228
229void
230BaseCPU::startup()
231{
232#if FULL_SYSTEM
233 if (!params()->defer_registration && profileEvent)
|
234 schedule(profileEvent, curTick);
| 234 schedule(profileEvent, curTick());
|
235#endif
236
237 if (params()->progress_interval) {
238 Tick num_ticks = ticks(params()->progress_interval);
239
240 Event *event;
241 event = new CPUProgressEvent(this, num_ticks);
242 }
243}
244
245
246void
247BaseCPU::regStats()
248{
249 using namespace Stats;
250
251 numCycles
252 .name(name() + ".numCycles")
253 .desc("number of cpu cycles simulated")
254 ;
255
256 int size = threadContexts.size();
257 if (size > 1) {
258 for (int i = 0; i < size; ++i) {
259 stringstream namestr;
260 ccprintf(namestr, "%s.ctx%d", name(), i);
261 threadContexts[i]->regStats(namestr.str());
262 }
263 } else if (size == 1)
264 threadContexts[0]->regStats(name());
265
266#if FULL_SYSTEM
267#endif
268}
269
270Tick
271BaseCPU::nextCycle()
272{
| 235#endif
236
237 if (params()->progress_interval) {
238 Tick num_ticks = ticks(params()->progress_interval);
239
240 Event *event;
241 event = new CPUProgressEvent(this, num_ticks);
242 }
243}
244
245
246void
247BaseCPU::regStats()
248{
249 using namespace Stats;
250
251 numCycles
252 .name(name() + ".numCycles")
253 .desc("number of cpu cycles simulated")
254 ;
255
256 int size = threadContexts.size();
257 if (size > 1) {
258 for (int i = 0; i < size; ++i) {
259 stringstream namestr;
260 ccprintf(namestr, "%s.ctx%d", name(), i);
261 threadContexts[i]->regStats(namestr.str());
262 }
263 } else if (size == 1)
264 threadContexts[0]->regStats(name());
265
266#if FULL_SYSTEM
267#endif
268}
269
270Tick
271BaseCPU::nextCycle()
272{
|
273 Tick next_tick = curTick - phase + clock - 1;
| 273 Tick next_tick = curTick() - phase + clock - 1;
|
274 next_tick -= (next_tick % clock);
275 next_tick += phase;
276 return next_tick;
277}
278
279Tick
280BaseCPU::nextCycle(Tick begin_tick)
281{
282 Tick next_tick = begin_tick;
283 if (next_tick % clock != 0)
284 next_tick = next_tick - (next_tick % clock) + clock;
285 next_tick += phase;
286
| 274 next_tick -= (next_tick % clock);
275 next_tick += phase;
276 return next_tick;
277}
278
279Tick
280BaseCPU::nextCycle(Tick begin_tick)
281{
282 Tick next_tick = begin_tick;
283 if (next_tick % clock != 0)
284 next_tick = next_tick - (next_tick % clock) + clock;
285 next_tick += phase;
286
|
287 assert(next_tick >= curTick);
| 287 assert(next_tick >= curTick());
|
288 return next_tick;
289}
290
291void
292BaseCPU::registerThreadContexts()
293{
294 ThreadID size = threadContexts.size();
295 for (ThreadID tid = 0; tid < size; ++tid) {
296 ThreadContext *tc = threadContexts[tid];
297
298 /** This is so that contextId and cpuId match where there is a
299 * 1cpu:1context relationship. Otherwise, the order of registration
300 * could affect the assignment and cpu 1 could have context id 3, for
301 * example. We may even want to do something like this for SMT so that
302 * cpu 0 has the lowest thread contexts and cpu N has the highest, but
303 * I'll just do this for now
304 */
305 if (numThreads == 1)
306 tc->setContextId(system->registerThreadContext(tc, _cpuId));
307 else
308 tc->setContextId(system->registerThreadContext(tc));
309#if !FULL_SYSTEM
310 tc->getProcessPtr()->assignThreadContext(tc->contextId());
311#endif
312 }
313}
314
315
316int
317BaseCPU::findContext(ThreadContext *tc)
318{
319 ThreadID size = threadContexts.size();
320 for (ThreadID tid = 0; tid < size; ++tid) {
321 if (tc == threadContexts[tid])
322 return tid;
323 }
324 return 0;
325}
326
327void
328BaseCPU::switchOut()
329{
330// panic("This CPU doesn't support sampling!");
331#if FULL_SYSTEM
332 if (profileEvent && profileEvent->scheduled())
333 deschedule(profileEvent);
334#endif
335}
336
337void
338BaseCPU::takeOverFrom(BaseCPU *oldCPU, Port *ic, Port *dc)
339{
340 assert(threadContexts.size() == oldCPU->threadContexts.size());
341
342 _cpuId = oldCPU->cpuId();
343
344 ThreadID size = threadContexts.size();
345 for (ThreadID i = 0; i < size; ++i) {
346 ThreadContext *newTC = threadContexts[i];
347 ThreadContext *oldTC = oldCPU->threadContexts[i];
348
349 newTC->takeOverFrom(oldTC);
350
351 CpuEvent::replaceThreadContext(oldTC, newTC);
352
353 assert(newTC->contextId() == oldTC->contextId());
354 assert(newTC->threadId() == oldTC->threadId());
355 system->replaceThreadContext(newTC, newTC->contextId());
356
357 /* This code no longer works since the zero register (e.g.,
358 * r31 on Alpha) doesn't necessarily contain zero at this
359 * point.
360 if (DTRACE(Context))
361 ThreadContext::compare(oldTC, newTC);
362 */
363
364 Port *old_itb_port, *old_dtb_port, *new_itb_port, *new_dtb_port;
365 old_itb_port = oldTC->getITBPtr()->getPort();
366 old_dtb_port = oldTC->getDTBPtr()->getPort();
367 new_itb_port = newTC->getITBPtr()->getPort();
368 new_dtb_port = newTC->getDTBPtr()->getPort();
369
370 // Move over any table walker ports if they exist
371 if (new_itb_port && !new_itb_port->isConnected()) {
372 assert(old_itb_port);
373 Port *peer = old_itb_port->getPeer();;
374 new_itb_port->setPeer(peer);
375 peer->setPeer(new_itb_port);
376 }
377 if (new_dtb_port && !new_dtb_port->isConnected()) {
378 assert(old_dtb_port);
379 Port *peer = old_dtb_port->getPeer();;
380 new_dtb_port->setPeer(peer);
381 peer->setPeer(new_dtb_port);
382 }
383 }
384
385#if FULL_SYSTEM
386 interrupts = oldCPU->interrupts;
387 interrupts->setCPU(this);
388
389 for (ThreadID i = 0; i < size; ++i)
390 threadContexts[i]->profileClear();
391
392 if (profileEvent)
| 288 return next_tick;
289}
290
291void
292BaseCPU::registerThreadContexts()
293{
294 ThreadID size = threadContexts.size();
295 for (ThreadID tid = 0; tid < size; ++tid) {
296 ThreadContext *tc = threadContexts[tid];
297
298 /** This is so that contextId and cpuId match where there is a
299 * 1cpu:1context relationship. Otherwise, the order of registration
300 * could affect the assignment and cpu 1 could have context id 3, for
301 * example. We may even want to do something like this for SMT so that
302 * cpu 0 has the lowest thread contexts and cpu N has the highest, but
303 * I'll just do this for now
304 */
305 if (numThreads == 1)
306 tc->setContextId(system->registerThreadContext(tc, _cpuId));
307 else
308 tc->setContextId(system->registerThreadContext(tc));
309#if !FULL_SYSTEM
310 tc->getProcessPtr()->assignThreadContext(tc->contextId());
311#endif
312 }
313}
314
315
316int
317BaseCPU::findContext(ThreadContext *tc)
318{
319 ThreadID size = threadContexts.size();
320 for (ThreadID tid = 0; tid < size; ++tid) {
321 if (tc == threadContexts[tid])
322 return tid;
323 }
324 return 0;
325}
326
327void
328BaseCPU::switchOut()
329{
330// panic("This CPU doesn't support sampling!");
331#if FULL_SYSTEM
332 if (profileEvent && profileEvent->scheduled())
333 deschedule(profileEvent);
334#endif
335}
336
337void
338BaseCPU::takeOverFrom(BaseCPU *oldCPU, Port *ic, Port *dc)
339{
340 assert(threadContexts.size() == oldCPU->threadContexts.size());
341
342 _cpuId = oldCPU->cpuId();
343
344 ThreadID size = threadContexts.size();
345 for (ThreadID i = 0; i < size; ++i) {
346 ThreadContext *newTC = threadContexts[i];
347 ThreadContext *oldTC = oldCPU->threadContexts[i];
348
349 newTC->takeOverFrom(oldTC);
350
351 CpuEvent::replaceThreadContext(oldTC, newTC);
352
353 assert(newTC->contextId() == oldTC->contextId());
354 assert(newTC->threadId() == oldTC->threadId());
355 system->replaceThreadContext(newTC, newTC->contextId());
356
357 /* This code no longer works since the zero register (e.g.,
358 * r31 on Alpha) doesn't necessarily contain zero at this
359 * point.
360 if (DTRACE(Context))
361 ThreadContext::compare(oldTC, newTC);
362 */
363
364 Port *old_itb_port, *old_dtb_port, *new_itb_port, *new_dtb_port;
365 old_itb_port = oldTC->getITBPtr()->getPort();
366 old_dtb_port = oldTC->getDTBPtr()->getPort();
367 new_itb_port = newTC->getITBPtr()->getPort();
368 new_dtb_port = newTC->getDTBPtr()->getPort();
369
370 // Move over any table walker ports if they exist
371 if (new_itb_port && !new_itb_port->isConnected()) {
372 assert(old_itb_port);
373 Port *peer = old_itb_port->getPeer();;
374 new_itb_port->setPeer(peer);
375 peer->setPeer(new_itb_port);
376 }
377 if (new_dtb_port && !new_dtb_port->isConnected()) {
378 assert(old_dtb_port);
379 Port *peer = old_dtb_port->getPeer();;
380 new_dtb_port->setPeer(peer);
381 peer->setPeer(new_dtb_port);
382 }
383 }
384
385#if FULL_SYSTEM
386 interrupts = oldCPU->interrupts;
387 interrupts->setCPU(this);
388
389 for (ThreadID i = 0; i < size; ++i)
390 threadContexts[i]->profileClear();
391
392 if (profileEvent)
|
393 schedule(profileEvent, curTick);
| 393 schedule(profileEvent, curTick());
|
394#endif
395
396 // Connect new CPU to old CPU's memory only if new CPU isn't
397 // connected to anything. Also connect old CPU's memory to new
398 // CPU.
399 if (!ic->isConnected()) {
400 Port *peer = oldCPU->getPort("icache_port")->getPeer();
401 ic->setPeer(peer);
402 peer->setPeer(ic);
403 }
404
405 if (!dc->isConnected()) {
406 Port *peer = oldCPU->getPort("dcache_port")->getPeer();
407 dc->setPeer(peer);
408 peer->setPeer(dc);
409 }
410}
411
412
413#if FULL_SYSTEM
414BaseCPU::ProfileEvent::ProfileEvent(BaseCPU *_cpu, Tick _interval)
415 : cpu(_cpu), interval(_interval)
416{ }
417
418void
419BaseCPU::ProfileEvent::process()
420{
421 ThreadID size = cpu->threadContexts.size();
422 for (ThreadID i = 0; i < size; ++i) {
423 ThreadContext *tc = cpu->threadContexts[i];
424 tc->profileSample();
425 }
426
| 394#endif
395
396 // Connect new CPU to old CPU's memory only if new CPU isn't
397 // connected to anything. Also connect old CPU's memory to new
398 // CPU.
399 if (!ic->isConnected()) {
400 Port *peer = oldCPU->getPort("icache_port")->getPeer();
401 ic->setPeer(peer);
402 peer->setPeer(ic);
403 }
404
405 if (!dc->isConnected()) {
406 Port *peer = oldCPU->getPort("dcache_port")->getPeer();
407 dc->setPeer(peer);
408 peer->setPeer(dc);
409 }
410}
411
412
413#if FULL_SYSTEM
414BaseCPU::ProfileEvent::ProfileEvent(BaseCPU *_cpu, Tick _interval)
415 : cpu(_cpu), interval(_interval)
416{ }
417
418void
419BaseCPU::ProfileEvent::process()
420{
421 ThreadID size = cpu->threadContexts.size();
422 for (ThreadID i = 0; i < size; ++i) {
423 ThreadContext *tc = cpu->threadContexts[i];
424 tc->profileSample();
425 }
426
|
427 cpu->schedule(this, curTick + interval);
| 427 cpu->schedule(this, curTick() + interval);
|
428}
429
430void
431BaseCPU::serialize(std::ostream &os)
432{
433 SERIALIZE_SCALAR(instCnt);
434 interrupts->serialize(os);
435}
436
437void
438BaseCPU::unserialize(Checkpoint *cp, const std::string §ion)
439{
440 UNSERIALIZE_SCALAR(instCnt);
441 interrupts->unserialize(cp, section);
442}
443
444#endif // FULL_SYSTEM
445
446void
447BaseCPU::traceFunctionsInternal(Addr pc)
448{
449 if (!debugSymbolTable)
450 return;
451
452 // if pc enters different function, print new function symbol and
453 // update saved range. Otherwise do nothing.
454 if (pc < currentFunctionStart || pc >= currentFunctionEnd) {
455 string sym_str;
456 bool found = debugSymbolTable->findNearestSymbol(pc, sym_str,
457 currentFunctionStart,
458 currentFunctionEnd);
459
460 if (!found) {
461 // no symbol found: use addr as label
462 sym_str = csprintf("0x%x", pc);
463 currentFunctionStart = pc;
464 currentFunctionEnd = pc + 1;
465 }
466
467 ccprintf(*functionTraceStream, " (%d)\n%d: %s",
| 428}
429
430void
431BaseCPU::serialize(std::ostream &os)
432{
433 SERIALIZE_SCALAR(instCnt);
434 interrupts->serialize(os);
435}
436
437void
438BaseCPU::unserialize(Checkpoint *cp, const std::string §ion)
439{
440 UNSERIALIZE_SCALAR(instCnt);
441 interrupts->unserialize(cp, section);
442}
443
444#endif // FULL_SYSTEM
445
446void
447BaseCPU::traceFunctionsInternal(Addr pc)
448{
449 if (!debugSymbolTable)
450 return;
451
452 // if pc enters different function, print new function symbol and
453 // update saved range. Otherwise do nothing.
454 if (pc < currentFunctionStart || pc >= currentFunctionEnd) {
455 string sym_str;
456 bool found = debugSymbolTable->findNearestSymbol(pc, sym_str,
457 currentFunctionStart,
458 currentFunctionEnd);
459
460 if (!found) {
461 // no symbol found: use addr as label
462 sym_str = csprintf("0x%x", pc);
463 currentFunctionStart = pc;
464 currentFunctionEnd = pc + 1;
465 }
466
467 ccprintf(*functionTraceStream, " (%d)\n%d: %s",
|
468 curTick - functionEntryTick, curTick, sym_str);
469 functionEntryTick = curTick;
| 468 curTick() - functionEntryTick, curTick(), sym_str);
469 functionEntryTick = curTick();
|
470 }
471}
| 470 }
471}
|