1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Steve Reinhardt
29 * Nathan Binkert
30 */
31
32#include <iostream>
33#include <string>
34#include <sstream>
35
36#include "base/cprintf.hh"
37#include "base/loader/symtab.hh"
38#include "base/misc.hh"
39#include "base/output.hh"
40#include "cpu/base.hh"
41#include "cpu/cpuevent.hh"
42#include "cpu/thread_context.hh"
43#include "cpu/profile.hh"
| 1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Steve Reinhardt
29 * Nathan Binkert
30 */
31
32#include <iostream>
33#include <string>
34#include <sstream>
35
36#include "base/cprintf.hh"
37#include "base/loader/symtab.hh"
38#include "base/misc.hh"
39#include "base/output.hh"
40#include "cpu/base.hh"
41#include "cpu/cpuevent.hh"
42#include "cpu/thread_context.hh"
43#include "cpu/profile.hh"
|
| 44#include "sim/sim_exit.hh"
|
44#include "sim/param.hh"
45#include "sim/process.hh"
46#include "sim/sim_events.hh"
47#include "sim/system.hh"
48
49#include "base/trace.hh"
50
51// Hack
52#include "sim/stat_control.hh"
53
54using namespace std;
55
56vector<BaseCPU *> BaseCPU::cpuList;
57
58// This variable reflects the max number of threads in any CPU. Be
59// careful to only use it once all the CPUs that you care about have
60// been initialized
61int maxThreadsPerCPU = 1;
62
63CPUProgressEvent::CPUProgressEvent(EventQueue *q, Tick ival,
64 BaseCPU *_cpu)
65 : Event(q, Event::Stat_Event_Pri), interval(ival),
66 lastNumInst(0), cpu(_cpu)
67{
68 if (interval)
69 schedule(curTick + interval);
70}
71
72void
73CPUProgressEvent::process()
74{
75 Counter temp = cpu->totalInstructions();
76#ifndef NDEBUG
77 double ipc = double(temp - lastNumInst) / (interval / cpu->cycles(1));
78
79 DPRINTFN("%s progress event, instructions committed: %lli, IPC: %0.8d\n",
80 cpu->name(), temp - lastNumInst, ipc);
81 ipc = 0.0;
82#else
83 cprintf("%lli: %s progress event, instructions committed: %lli\n",
84 curTick, cpu->name(), temp - lastNumInst);
85#endif
86 lastNumInst = temp;
87 schedule(curTick + interval);
88}
89
90const char *
91CPUProgressEvent::description()
92{
93 return "CPU Progress event";
94}
95
96#if FULL_SYSTEM
97BaseCPU::BaseCPU(Params *p)
98 : MemObject(p->name), clock(p->clock), checkInterrupts(true),
99 params(p), number_of_threads(p->numberOfThreads), system(p->system)
100#else
101BaseCPU::BaseCPU(Params *p)
102 : MemObject(p->name), clock(p->clock), params(p),
103 number_of_threads(p->numberOfThreads), system(p->system)
104#endif
105{
106// currentTick = curTick;
107 DPRINTF(FullCPU, "BaseCPU: Creating object, mem address %#x.\n", this);
108
109 // add self to global list of CPUs
110 cpuList.push_back(this);
111
112 DPRINTF(FullCPU, "BaseCPU: CPU added to cpuList, mem address %#x.\n",
113 this);
114
115 if (number_of_threads > maxThreadsPerCPU)
116 maxThreadsPerCPU = number_of_threads;
117
118 // allocate per-thread instruction-based event queues
119 comInstEventQueue = new EventQueue *[number_of_threads];
120 for (int i = 0; i < number_of_threads; ++i)
121 comInstEventQueue[i] = new EventQueue("instruction-based event queue");
122
123 //
124 // set up instruction-count-based termination events, if any
125 //
126 if (p->max_insts_any_thread != 0)
127 for (int i = 0; i < number_of_threads; ++i)
| 45#include "sim/param.hh"
46#include "sim/process.hh"
47#include "sim/sim_events.hh"
48#include "sim/system.hh"
49
50#include "base/trace.hh"
51
52// Hack
53#include "sim/stat_control.hh"
54
55using namespace std;
56
57vector<BaseCPU *> BaseCPU::cpuList;
58
59// This variable reflects the max number of threads in any CPU. Be
60// careful to only use it once all the CPUs that you care about have
61// been initialized
62int maxThreadsPerCPU = 1;
63
64CPUProgressEvent::CPUProgressEvent(EventQueue *q, Tick ival,
65 BaseCPU *_cpu)
66 : Event(q, Event::Stat_Event_Pri), interval(ival),
67 lastNumInst(0), cpu(_cpu)
68{
69 if (interval)
70 schedule(curTick + interval);
71}
72
73void
74CPUProgressEvent::process()
75{
76 Counter temp = cpu->totalInstructions();
77#ifndef NDEBUG
78 double ipc = double(temp - lastNumInst) / (interval / cpu->cycles(1));
79
80 DPRINTFN("%s progress event, instructions committed: %lli, IPC: %0.8d\n",
81 cpu->name(), temp - lastNumInst, ipc);
82 ipc = 0.0;
83#else
84 cprintf("%lli: %s progress event, instructions committed: %lli\n",
85 curTick, cpu->name(), temp - lastNumInst);
86#endif
87 lastNumInst = temp;
88 schedule(curTick + interval);
89}
90
91const char *
92CPUProgressEvent::description()
93{
94 return "CPU Progress event";
95}
96
97#if FULL_SYSTEM
98BaseCPU::BaseCPU(Params *p)
99 : MemObject(p->name), clock(p->clock), checkInterrupts(true),
100 params(p), number_of_threads(p->numberOfThreads), system(p->system)
101#else
102BaseCPU::BaseCPU(Params *p)
103 : MemObject(p->name), clock(p->clock), params(p),
104 number_of_threads(p->numberOfThreads), system(p->system)
105#endif
106{
107// currentTick = curTick;
108 DPRINTF(FullCPU, "BaseCPU: Creating object, mem address %#x.\n", this);
109
110 // add self to global list of CPUs
111 cpuList.push_back(this);
112
113 DPRINTF(FullCPU, "BaseCPU: CPU added to cpuList, mem address %#x.\n",
114 this);
115
116 if (number_of_threads > maxThreadsPerCPU)
117 maxThreadsPerCPU = number_of_threads;
118
119 // allocate per-thread instruction-based event queues
120 comInstEventQueue = new EventQueue *[number_of_threads];
121 for (int i = 0; i < number_of_threads; ++i)
122 comInstEventQueue[i] = new EventQueue("instruction-based event queue");
123
124 //
125 // set up instruction-count-based termination events, if any
126 //
127 if (p->max_insts_any_thread != 0)
128 for (int i = 0; i < number_of_threads; ++i)
|
128 new SimLoopExitEvent(comInstEventQueue[i], p->max_insts_any_thread,
129 "a thread reached the max instruction count");
| 129 schedExitSimLoop("a thread reached the max instruction count",
130 p->max_insts_any_thread, 0,
131 comInstEventQueue[i]);
|
130
131 if (p->max_insts_all_threads != 0) {
132 // allocate & initialize shared downcounter: each event will
133 // decrement this when triggered; simulation will terminate
134 // when counter reaches 0
135 int *counter = new int;
136 *counter = number_of_threads;
137 for (int i = 0; i < number_of_threads; ++i)
138 new CountedExitEvent(comInstEventQueue[i],
139 "all threads reached the max instruction count",
140 p->max_insts_all_threads, *counter);
141 }
142
143 // allocate per-thread load-based event queues
144 comLoadEventQueue = new EventQueue *[number_of_threads];
145 for (int i = 0; i < number_of_threads; ++i)
146 comLoadEventQueue[i] = new EventQueue("load-based event queue");
147
148 //
149 // set up instruction-count-based termination events, if any
150 //
151 if (p->max_loads_any_thread != 0)
152 for (int i = 0; i < number_of_threads; ++i)
| 132
133 if (p->max_insts_all_threads != 0) {
134 // allocate & initialize shared downcounter: each event will
135 // decrement this when triggered; simulation will terminate
136 // when counter reaches 0
137 int *counter = new int;
138 *counter = number_of_threads;
139 for (int i = 0; i < number_of_threads; ++i)
140 new CountedExitEvent(comInstEventQueue[i],
141 "all threads reached the max instruction count",
142 p->max_insts_all_threads, *counter);
143 }
144
145 // allocate per-thread load-based event queues
146 comLoadEventQueue = new EventQueue *[number_of_threads];
147 for (int i = 0; i < number_of_threads; ++i)
148 comLoadEventQueue[i] = new EventQueue("load-based event queue");
149
150 //
151 // set up instruction-count-based termination events, if any
152 //
153 if (p->max_loads_any_thread != 0)
154 for (int i = 0; i < number_of_threads; ++i)
|
153 new SimLoopExitEvent(comLoadEventQueue[i], p->max_loads_any_thread,
154 "a thread reached the max load count");
| 155 schedExitSimLoop("a thread reached the max load count",
156 p->max_loads_any_thread, 0,
157 comLoadEventQueue[i]);
|
155
156 if (p->max_loads_all_threads != 0) {
157 // allocate & initialize shared downcounter: each event will
158 // decrement this when triggered; simulation will terminate
159 // when counter reaches 0
160 int *counter = new int;
161 *counter = number_of_threads;
162 for (int i = 0; i < number_of_threads; ++i)
163 new CountedExitEvent(comLoadEventQueue[i],
164 "all threads reached the max load count",
165 p->max_loads_all_threads, *counter);
166 }
167
168#if FULL_SYSTEM
169 memset(interrupts, 0, sizeof(interrupts));
170 intstatus = 0;
171#endif
172
173 functionTracingEnabled = false;
174 if (p->functionTrace) {
175 functionTraceStream = simout.find(csprintf("ftrace.%s", name()));
176 currentFunctionStart = currentFunctionEnd = 0;
177 functionEntryTick = p->functionTraceStart;
178
179 if (p->functionTraceStart == 0) {
180 functionTracingEnabled = true;
181 } else {
182 Event *e =
183 new EventWrapper<BaseCPU, &BaseCPU::enableFunctionTrace>(this,
184 true);
185 e->schedule(p->functionTraceStart);
186 }
187 }
188#if FULL_SYSTEM
189 profileEvent = NULL;
190 if (params->profile)
191 profileEvent = new ProfileEvent(this, params->profile);
192#endif
193}
194
195BaseCPU::Params::Params()
196{
197#if FULL_SYSTEM
198 profile = false;
199#endif
200 checker = NULL;
201}
202
203void
204BaseCPU::enableFunctionTrace()
205{
206 functionTracingEnabled = true;
207}
208
209BaseCPU::~BaseCPU()
210{
211}
212
213void
214BaseCPU::init()
215{
216 if (!params->deferRegistration)
217 registerThreadContexts();
218}
219
220void
221BaseCPU::startup()
222{
223#if FULL_SYSTEM
224 if (!params->deferRegistration && profileEvent)
225 profileEvent->schedule(curTick);
226#endif
227
228 if (params->progress_interval) {
229 new CPUProgressEvent(&mainEventQueue, params->progress_interval,
230 this);
231 }
232}
233
234
235void
236BaseCPU::regStats()
237{
238 using namespace Stats;
239
240 numCycles
241 .name(name() + ".numCycles")
242 .desc("number of cpu cycles simulated")
243 ;
244
245 int size = threadContexts.size();
246 if (size > 1) {
247 for (int i = 0; i < size; ++i) {
248 stringstream namestr;
249 ccprintf(namestr, "%s.ctx%d", name(), i);
250 threadContexts[i]->regStats(namestr.str());
251 }
252 } else if (size == 1)
253 threadContexts[0]->regStats(name());
254
255#if FULL_SYSTEM
256#endif
257}
258
259
260void
261BaseCPU::registerThreadContexts()
262{
263 for (int i = 0; i < threadContexts.size(); ++i) {
264 ThreadContext *tc = threadContexts[i];
265
266#if FULL_SYSTEM
267 int id = params->cpu_id;
268 if (id != -1)
269 id += i;
270
271 tc->setCpuId(system->registerThreadContext(tc, id));
272#else
273 tc->setCpuId(tc->getProcessPtr()->registerThreadContext(tc));
274#endif
275 }
276}
277
278
279void
280BaseCPU::switchOut()
281{
282// panic("This CPU doesn't support sampling!");
283#if FULL_SYSTEM
284 if (profileEvent && profileEvent->scheduled())
285 profileEvent->deschedule();
286#endif
287}
288
289void
290BaseCPU::takeOverFrom(BaseCPU *oldCPU)
291{
292 assert(threadContexts.size() == oldCPU->threadContexts.size());
293
294 for (int i = 0; i < threadContexts.size(); ++i) {
295 ThreadContext *newTC = threadContexts[i];
296 ThreadContext *oldTC = oldCPU->threadContexts[i];
297
298 newTC->takeOverFrom(oldTC);
299
300 CpuEvent::replaceThreadContext(oldTC, newTC);
301
302 assert(newTC->readCpuId() == oldTC->readCpuId());
303#if FULL_SYSTEM
304 system->replaceThreadContext(newTC, newTC->readCpuId());
305#else
306 assert(newTC->getProcessPtr() == oldTC->getProcessPtr());
307 newTC->getProcessPtr()->replaceThreadContext(newTC, newTC->readCpuId());
308#endif
309
310// TheISA::compareXCs(oldXC, newXC);
311 }
312
313#if FULL_SYSTEM
314 for (int i = 0; i < TheISA::NumInterruptLevels; ++i)
315 interrupts[i] = oldCPU->interrupts[i];
316 intstatus = oldCPU->intstatus;
317 checkInterrupts = oldCPU->checkInterrupts;
318
319 for (int i = 0; i < threadContexts.size(); ++i)
320 threadContexts[i]->profileClear();
321
322 // The Sampler must take care of this!
323// if (profileEvent)
324// profileEvent->schedule(curTick);
325#endif
326}
327
328
329#if FULL_SYSTEM
330BaseCPU::ProfileEvent::ProfileEvent(BaseCPU *_cpu, int _interval)
331 : Event(&mainEventQueue), cpu(_cpu), interval(_interval)
332{ }
333
334void
335BaseCPU::ProfileEvent::process()
336{
337 for (int i = 0, size = cpu->threadContexts.size(); i < size; ++i) {
338 ThreadContext *tc = cpu->threadContexts[i];
339 tc->profileSample();
340 }
341
342 schedule(curTick + interval);
343}
344
345void
346BaseCPU::post_interrupt(int int_num, int index)
347{
348 DPRINTF(Interrupt, "Interrupt %d:%d posted\n", int_num, index);
349
350 if (int_num < 0 || int_num >= TheISA::NumInterruptLevels)
351 panic("int_num out of bounds\n");
352
353 if (index < 0 || index >= sizeof(uint64_t) * 8)
354 panic("int_num out of bounds\n");
355
356 checkInterrupts = true;
357 interrupts[int_num] |= 1 << index;
358 intstatus |= (ULL(1) << int_num);
359}
360
361void
362BaseCPU::clear_interrupt(int int_num, int index)
363{
364 DPRINTF(Interrupt, "Interrupt %d:%d cleared\n", int_num, index);
365
366 if (int_num < 0 || int_num >= TheISA::NumInterruptLevels)
367 panic("int_num out of bounds\n");
368
369 if (index < 0 || index >= sizeof(uint64_t) * 8)
370 panic("int_num out of bounds\n");
371
372 interrupts[int_num] &= ~(1 << index);
373 if (interrupts[int_num] == 0)
374 intstatus &= ~(ULL(1) << int_num);
375}
376
377void
378BaseCPU::clear_interrupts()
379{
380 DPRINTF(Interrupt, "Interrupts all cleared\n");
381
382 memset(interrupts, 0, sizeof(interrupts));
383 intstatus = 0;
384}
385
386
387void
388BaseCPU::serialize(std::ostream &os)
389{
390 SERIALIZE_ARRAY(interrupts, TheISA::NumInterruptLevels);
391 SERIALIZE_SCALAR(intstatus);
392}
393
394void
395BaseCPU::unserialize(Checkpoint *cp, const std::string §ion)
396{
397 UNSERIALIZE_ARRAY(interrupts, TheISA::NumInterruptLevels);
398 UNSERIALIZE_SCALAR(intstatus);
399}
400
401#endif // FULL_SYSTEM
402
403void
404BaseCPU::traceFunctionsInternal(Addr pc)
405{
406 if (!debugSymbolTable)
407 return;
408
409 // if pc enters different function, print new function symbol and
410 // update saved range. Otherwise do nothing.
411 if (pc < currentFunctionStart || pc >= currentFunctionEnd) {
412 string sym_str;
413 bool found = debugSymbolTable->findNearestSymbol(pc, sym_str,
414 currentFunctionStart,
415 currentFunctionEnd);
416
417 if (!found) {
418 // no symbol found: use addr as label
419 sym_str = csprintf("0x%x", pc);
420 currentFunctionStart = pc;
421 currentFunctionEnd = pc + 1;
422 }
423
424 ccprintf(*functionTraceStream, " (%d)\n%d: %s",
425 curTick - functionEntryTick, curTick, sym_str);
426 functionEntryTick = curTick;
427 }
428}
429
430
431DEFINE_SIM_OBJECT_CLASS_NAME("BaseCPU", BaseCPU)
| 158
159 if (p->max_loads_all_threads != 0) {
160 // allocate & initialize shared downcounter: each event will
161 // decrement this when triggered; simulation will terminate
162 // when counter reaches 0
163 int *counter = new int;
164 *counter = number_of_threads;
165 for (int i = 0; i < number_of_threads; ++i)
166 new CountedExitEvent(comLoadEventQueue[i],
167 "all threads reached the max load count",
168 p->max_loads_all_threads, *counter);
169 }
170
171#if FULL_SYSTEM
172 memset(interrupts, 0, sizeof(interrupts));
173 intstatus = 0;
174#endif
175
176 functionTracingEnabled = false;
177 if (p->functionTrace) {
178 functionTraceStream = simout.find(csprintf("ftrace.%s", name()));
179 currentFunctionStart = currentFunctionEnd = 0;
180 functionEntryTick = p->functionTraceStart;
181
182 if (p->functionTraceStart == 0) {
183 functionTracingEnabled = true;
184 } else {
185 Event *e =
186 new EventWrapper<BaseCPU, &BaseCPU::enableFunctionTrace>(this,
187 true);
188 e->schedule(p->functionTraceStart);
189 }
190 }
191#if FULL_SYSTEM
192 profileEvent = NULL;
193 if (params->profile)
194 profileEvent = new ProfileEvent(this, params->profile);
195#endif
196}
197
198BaseCPU::Params::Params()
199{
200#if FULL_SYSTEM
201 profile = false;
202#endif
203 checker = NULL;
204}
205
206void
207BaseCPU::enableFunctionTrace()
208{
209 functionTracingEnabled = true;
210}
211
212BaseCPU::~BaseCPU()
213{
214}
215
216void
217BaseCPU::init()
218{
219 if (!params->deferRegistration)
220 registerThreadContexts();
221}
222
223void
224BaseCPU::startup()
225{
226#if FULL_SYSTEM
227 if (!params->deferRegistration && profileEvent)
228 profileEvent->schedule(curTick);
229#endif
230
231 if (params->progress_interval) {
232 new CPUProgressEvent(&mainEventQueue, params->progress_interval,
233 this);
234 }
235}
236
237
238void
239BaseCPU::regStats()
240{
241 using namespace Stats;
242
243 numCycles
244 .name(name() + ".numCycles")
245 .desc("number of cpu cycles simulated")
246 ;
247
248 int size = threadContexts.size();
249 if (size > 1) {
250 for (int i = 0; i < size; ++i) {
251 stringstream namestr;
252 ccprintf(namestr, "%s.ctx%d", name(), i);
253 threadContexts[i]->regStats(namestr.str());
254 }
255 } else if (size == 1)
256 threadContexts[0]->regStats(name());
257
258#if FULL_SYSTEM
259#endif
260}
261
262
263void
264BaseCPU::registerThreadContexts()
265{
266 for (int i = 0; i < threadContexts.size(); ++i) {
267 ThreadContext *tc = threadContexts[i];
268
269#if FULL_SYSTEM
270 int id = params->cpu_id;
271 if (id != -1)
272 id += i;
273
274 tc->setCpuId(system->registerThreadContext(tc, id));
275#else
276 tc->setCpuId(tc->getProcessPtr()->registerThreadContext(tc));
277#endif
278 }
279}
280
281
282void
283BaseCPU::switchOut()
284{
285// panic("This CPU doesn't support sampling!");
286#if FULL_SYSTEM
287 if (profileEvent && profileEvent->scheduled())
288 profileEvent->deschedule();
289#endif
290}
291
292void
293BaseCPU::takeOverFrom(BaseCPU *oldCPU)
294{
295 assert(threadContexts.size() == oldCPU->threadContexts.size());
296
297 for (int i = 0; i < threadContexts.size(); ++i) {
298 ThreadContext *newTC = threadContexts[i];
299 ThreadContext *oldTC = oldCPU->threadContexts[i];
300
301 newTC->takeOverFrom(oldTC);
302
303 CpuEvent::replaceThreadContext(oldTC, newTC);
304
305 assert(newTC->readCpuId() == oldTC->readCpuId());
306#if FULL_SYSTEM
307 system->replaceThreadContext(newTC, newTC->readCpuId());
308#else
309 assert(newTC->getProcessPtr() == oldTC->getProcessPtr());
310 newTC->getProcessPtr()->replaceThreadContext(newTC, newTC->readCpuId());
311#endif
312
313// TheISA::compareXCs(oldXC, newXC);
314 }
315
316#if FULL_SYSTEM
317 for (int i = 0; i < TheISA::NumInterruptLevels; ++i)
318 interrupts[i] = oldCPU->interrupts[i];
319 intstatus = oldCPU->intstatus;
320 checkInterrupts = oldCPU->checkInterrupts;
321
322 for (int i = 0; i < threadContexts.size(); ++i)
323 threadContexts[i]->profileClear();
324
325 // The Sampler must take care of this!
326// if (profileEvent)
327// profileEvent->schedule(curTick);
328#endif
329}
330
331
332#if FULL_SYSTEM
333BaseCPU::ProfileEvent::ProfileEvent(BaseCPU *_cpu, int _interval)
334 : Event(&mainEventQueue), cpu(_cpu), interval(_interval)
335{ }
336
337void
338BaseCPU::ProfileEvent::process()
339{
340 for (int i = 0, size = cpu->threadContexts.size(); i < size; ++i) {
341 ThreadContext *tc = cpu->threadContexts[i];
342 tc->profileSample();
343 }
344
345 schedule(curTick + interval);
346}
347
348void
349BaseCPU::post_interrupt(int int_num, int index)
350{
351 DPRINTF(Interrupt, "Interrupt %d:%d posted\n", int_num, index);
352
353 if (int_num < 0 || int_num >= TheISA::NumInterruptLevels)
354 panic("int_num out of bounds\n");
355
356 if (index < 0 || index >= sizeof(uint64_t) * 8)
357 panic("int_num out of bounds\n");
358
359 checkInterrupts = true;
360 interrupts[int_num] |= 1 << index;
361 intstatus |= (ULL(1) << int_num);
362}
363
364void
365BaseCPU::clear_interrupt(int int_num, int index)
366{
367 DPRINTF(Interrupt, "Interrupt %d:%d cleared\n", int_num, index);
368
369 if (int_num < 0 || int_num >= TheISA::NumInterruptLevels)
370 panic("int_num out of bounds\n");
371
372 if (index < 0 || index >= sizeof(uint64_t) * 8)
373 panic("int_num out of bounds\n");
374
375 interrupts[int_num] &= ~(1 << index);
376 if (interrupts[int_num] == 0)
377 intstatus &= ~(ULL(1) << int_num);
378}
379
380void
381BaseCPU::clear_interrupts()
382{
383 DPRINTF(Interrupt, "Interrupts all cleared\n");
384
385 memset(interrupts, 0, sizeof(interrupts));
386 intstatus = 0;
387}
388
389
390void
391BaseCPU::serialize(std::ostream &os)
392{
393 SERIALIZE_ARRAY(interrupts, TheISA::NumInterruptLevels);
394 SERIALIZE_SCALAR(intstatus);
395}
396
397void
398BaseCPU::unserialize(Checkpoint *cp, const std::string §ion)
399{
400 UNSERIALIZE_ARRAY(interrupts, TheISA::NumInterruptLevels);
401 UNSERIALIZE_SCALAR(intstatus);
402}
403
404#endif // FULL_SYSTEM
405
406void
407BaseCPU::traceFunctionsInternal(Addr pc)
408{
409 if (!debugSymbolTable)
410 return;
411
412 // if pc enters different function, print new function symbol and
413 // update saved range. Otherwise do nothing.
414 if (pc < currentFunctionStart || pc >= currentFunctionEnd) {
415 string sym_str;
416 bool found = debugSymbolTable->findNearestSymbol(pc, sym_str,
417 currentFunctionStart,
418 currentFunctionEnd);
419
420 if (!found) {
421 // no symbol found: use addr as label
422 sym_str = csprintf("0x%x", pc);
423 currentFunctionStart = pc;
424 currentFunctionEnd = pc + 1;
425 }
426
427 ccprintf(*functionTraceStream, " (%d)\n%d: %s",
428 curTick - functionEntryTick, curTick, sym_str);
429 functionEntryTick = curTick;
430 }
431}
432
433
434DEFINE_SIM_OBJECT_CLASS_NAME("BaseCPU", BaseCPU)
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