base.cc (2708:c4157b162e7b) base.cc (2798:751e9170247e)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Steve Reinhardt
29 * Nathan Binkert
30 */
31
32#include <iostream>
33#include <string>
34#include <sstream>
35
36#include "base/cprintf.hh"
37#include "base/loader/symtab.hh"
38#include "base/misc.hh"
39#include "base/output.hh"
40#include "cpu/base.hh"
41#include "cpu/cpuevent.hh"
42#include "cpu/thread_context.hh"
43#include "cpu/profile.hh"
44#include "cpu/sampler/sampler.hh"
45#include "sim/param.hh"
46#include "sim/process.hh"
47#include "sim/sim_events.hh"
48#include "sim/system.hh"
49
50#include "base/trace.hh"
51
52using namespace std;
53
54vector<BaseCPU *> BaseCPU::cpuList;
55
56// This variable reflects the max number of threads in any CPU. Be
57// careful to only use it once all the CPUs that you care about have
58// been initialized
59int maxThreadsPerCPU = 1;
60
61#if FULL_SYSTEM
62BaseCPU::BaseCPU(Params *p)
63 : SimObject(p->name), clock(p->clock), checkInterrupts(true),
64 params(p), number_of_threads(p->numberOfThreads), system(p->system)
65#else
66BaseCPU::BaseCPU(Params *p)
67 : SimObject(p->name), clock(p->clock), params(p),
68 number_of_threads(p->numberOfThreads), system(p->system)
69#endif
70{
71 DPRINTF(FullCPU, "BaseCPU: Creating object, mem address %#x.\n", this);
72
73 // add self to global list of CPUs
74 cpuList.push_back(this);
75
76 DPRINTF(FullCPU, "BaseCPU: CPU added to cpuList, mem address %#x.\n",
77 this);
78
79 if (number_of_threads > maxThreadsPerCPU)
80 maxThreadsPerCPU = number_of_threads;
81
82 // allocate per-thread instruction-based event queues
83 comInstEventQueue = new EventQueue *[number_of_threads];
84 for (int i = 0; i < number_of_threads; ++i)
85 comInstEventQueue[i] = new EventQueue("instruction-based event queue");
86
87 //
88 // set up instruction-count-based termination events, if any
89 //
90 if (p->max_insts_any_thread != 0)
91 for (int i = 0; i < number_of_threads; ++i)
92 new SimLoopExitEvent(comInstEventQueue[i], p->max_insts_any_thread,
93 "a thread reached the max instruction count");
94
95 if (p->max_insts_all_threads != 0) {
96 // allocate & initialize shared downcounter: each event will
97 // decrement this when triggered; simulation will terminate
98 // when counter reaches 0
99 int *counter = new int;
100 *counter = number_of_threads;
101 for (int i = 0; i < number_of_threads; ++i)
102 new CountedExitEvent(comInstEventQueue[i],
103 "all threads reached the max instruction count",
104 p->max_insts_all_threads, *counter);
105 }
106
107 // allocate per-thread load-based event queues
108 comLoadEventQueue = new EventQueue *[number_of_threads];
109 for (int i = 0; i < number_of_threads; ++i)
110 comLoadEventQueue[i] = new EventQueue("load-based event queue");
111
112 //
113 // set up instruction-count-based termination events, if any
114 //
115 if (p->max_loads_any_thread != 0)
116 for (int i = 0; i < number_of_threads; ++i)
117 new SimLoopExitEvent(comLoadEventQueue[i], p->max_loads_any_thread,
118 "a thread reached the max load count");
119
120 if (p->max_loads_all_threads != 0) {
121 // allocate & initialize shared downcounter: each event will
122 // decrement this when triggered; simulation will terminate
123 // when counter reaches 0
124 int *counter = new int;
125 *counter = number_of_threads;
126 for (int i = 0; i < number_of_threads; ++i)
127 new CountedExitEvent(comLoadEventQueue[i],
128 "all threads reached the max load count",
129 p->max_loads_all_threads, *counter);
130 }
131
132#if FULL_SYSTEM
133 memset(interrupts, 0, sizeof(interrupts));
134 intstatus = 0;
135#endif
136
137 functionTracingEnabled = false;
138 if (p->functionTrace) {
139 functionTraceStream = simout.find(csprintf("ftrace.%s", name()));
140 currentFunctionStart = currentFunctionEnd = 0;
141 functionEntryTick = p->functionTraceStart;
142
143 if (p->functionTraceStart == 0) {
144 functionTracingEnabled = true;
145 } else {
146 Event *e =
147 new EventWrapper<BaseCPU, &BaseCPU::enableFunctionTrace>(this,
148 true);
149 e->schedule(p->functionTraceStart);
150 }
151 }
152#if FULL_SYSTEM
153 profileEvent = NULL;
154 if (params->profile)
155 profileEvent = new ProfileEvent(this, params->profile);
156#endif
157
158}
159
160BaseCPU::Params::Params()
161{
162#if FULL_SYSTEM
163 profile = false;
164#endif
165 checker = NULL;
166}
167
168void
169BaseCPU::enableFunctionTrace()
170{
171 functionTracingEnabled = true;
172}
173
174BaseCPU::~BaseCPU()
175{
176}
177
178void
179BaseCPU::init()
180{
181 if (!params->deferRegistration)
182 registerThreadContexts();
183}
184
185void
186BaseCPU::startup()
187{
188#if FULL_SYSTEM
189 if (!params->deferRegistration && profileEvent)
190 profileEvent->schedule(curTick);
191#endif
192}
193
194
195void
196BaseCPU::regStats()
197{
198 using namespace Stats;
199
200 numCycles
201 .name(name() + ".numCycles")
202 .desc("number of cpu cycles simulated")
203 ;
204
205 int size = threadContexts.size();
206 if (size > 1) {
207 for (int i = 0; i < size; ++i) {
208 stringstream namestr;
209 ccprintf(namestr, "%s.ctx%d", name(), i);
210 threadContexts[i]->regStats(namestr.str());
211 }
212 } else if (size == 1)
213 threadContexts[0]->regStats(name());
214
215#if FULL_SYSTEM
216#endif
217}
218
219
220void
221BaseCPU::registerThreadContexts()
222{
223 for (int i = 0; i < threadContexts.size(); ++i) {
224 ThreadContext *tc = threadContexts[i];
225
226#if FULL_SYSTEM
227 int id = params->cpu_id;
228 if (id != -1)
229 id += i;
230
231 tc->setCpuId(system->registerThreadContext(tc, id));
232#else
233 tc->setCpuId(tc->getProcessPtr()->registerThreadContext(tc));
234#endif
235 }
236}
237
238
239void
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Steve Reinhardt
29 * Nathan Binkert
30 */
31
32#include <iostream>
33#include <string>
34#include <sstream>
35
36#include "base/cprintf.hh"
37#include "base/loader/symtab.hh"
38#include "base/misc.hh"
39#include "base/output.hh"
40#include "cpu/base.hh"
41#include "cpu/cpuevent.hh"
42#include "cpu/thread_context.hh"
43#include "cpu/profile.hh"
44#include "cpu/sampler/sampler.hh"
45#include "sim/param.hh"
46#include "sim/process.hh"
47#include "sim/sim_events.hh"
48#include "sim/system.hh"
49
50#include "base/trace.hh"
51
52using namespace std;
53
54vector<BaseCPU *> BaseCPU::cpuList;
55
56// This variable reflects the max number of threads in any CPU. Be
57// careful to only use it once all the CPUs that you care about have
58// been initialized
59int maxThreadsPerCPU = 1;
60
61#if FULL_SYSTEM
62BaseCPU::BaseCPU(Params *p)
63 : SimObject(p->name), clock(p->clock), checkInterrupts(true),
64 params(p), number_of_threads(p->numberOfThreads), system(p->system)
65#else
66BaseCPU::BaseCPU(Params *p)
67 : SimObject(p->name), clock(p->clock), params(p),
68 number_of_threads(p->numberOfThreads), system(p->system)
69#endif
70{
71 DPRINTF(FullCPU, "BaseCPU: Creating object, mem address %#x.\n", this);
72
73 // add self to global list of CPUs
74 cpuList.push_back(this);
75
76 DPRINTF(FullCPU, "BaseCPU: CPU added to cpuList, mem address %#x.\n",
77 this);
78
79 if (number_of_threads > maxThreadsPerCPU)
80 maxThreadsPerCPU = number_of_threads;
81
82 // allocate per-thread instruction-based event queues
83 comInstEventQueue = new EventQueue *[number_of_threads];
84 for (int i = 0; i < number_of_threads; ++i)
85 comInstEventQueue[i] = new EventQueue("instruction-based event queue");
86
87 //
88 // set up instruction-count-based termination events, if any
89 //
90 if (p->max_insts_any_thread != 0)
91 for (int i = 0; i < number_of_threads; ++i)
92 new SimLoopExitEvent(comInstEventQueue[i], p->max_insts_any_thread,
93 "a thread reached the max instruction count");
94
95 if (p->max_insts_all_threads != 0) {
96 // allocate & initialize shared downcounter: each event will
97 // decrement this when triggered; simulation will terminate
98 // when counter reaches 0
99 int *counter = new int;
100 *counter = number_of_threads;
101 for (int i = 0; i < number_of_threads; ++i)
102 new CountedExitEvent(comInstEventQueue[i],
103 "all threads reached the max instruction count",
104 p->max_insts_all_threads, *counter);
105 }
106
107 // allocate per-thread load-based event queues
108 comLoadEventQueue = new EventQueue *[number_of_threads];
109 for (int i = 0; i < number_of_threads; ++i)
110 comLoadEventQueue[i] = new EventQueue("load-based event queue");
111
112 //
113 // set up instruction-count-based termination events, if any
114 //
115 if (p->max_loads_any_thread != 0)
116 for (int i = 0; i < number_of_threads; ++i)
117 new SimLoopExitEvent(comLoadEventQueue[i], p->max_loads_any_thread,
118 "a thread reached the max load count");
119
120 if (p->max_loads_all_threads != 0) {
121 // allocate & initialize shared downcounter: each event will
122 // decrement this when triggered; simulation will terminate
123 // when counter reaches 0
124 int *counter = new int;
125 *counter = number_of_threads;
126 for (int i = 0; i < number_of_threads; ++i)
127 new CountedExitEvent(comLoadEventQueue[i],
128 "all threads reached the max load count",
129 p->max_loads_all_threads, *counter);
130 }
131
132#if FULL_SYSTEM
133 memset(interrupts, 0, sizeof(interrupts));
134 intstatus = 0;
135#endif
136
137 functionTracingEnabled = false;
138 if (p->functionTrace) {
139 functionTraceStream = simout.find(csprintf("ftrace.%s", name()));
140 currentFunctionStart = currentFunctionEnd = 0;
141 functionEntryTick = p->functionTraceStart;
142
143 if (p->functionTraceStart == 0) {
144 functionTracingEnabled = true;
145 } else {
146 Event *e =
147 new EventWrapper<BaseCPU, &BaseCPU::enableFunctionTrace>(this,
148 true);
149 e->schedule(p->functionTraceStart);
150 }
151 }
152#if FULL_SYSTEM
153 profileEvent = NULL;
154 if (params->profile)
155 profileEvent = new ProfileEvent(this, params->profile);
156#endif
157
158}
159
160BaseCPU::Params::Params()
161{
162#if FULL_SYSTEM
163 profile = false;
164#endif
165 checker = NULL;
166}
167
168void
169BaseCPU::enableFunctionTrace()
170{
171 functionTracingEnabled = true;
172}
173
174BaseCPU::~BaseCPU()
175{
176}
177
178void
179BaseCPU::init()
180{
181 if (!params->deferRegistration)
182 registerThreadContexts();
183}
184
185void
186BaseCPU::startup()
187{
188#if FULL_SYSTEM
189 if (!params->deferRegistration && profileEvent)
190 profileEvent->schedule(curTick);
191#endif
192}
193
194
195void
196BaseCPU::regStats()
197{
198 using namespace Stats;
199
200 numCycles
201 .name(name() + ".numCycles")
202 .desc("number of cpu cycles simulated")
203 ;
204
205 int size = threadContexts.size();
206 if (size > 1) {
207 for (int i = 0; i < size; ++i) {
208 stringstream namestr;
209 ccprintf(namestr, "%s.ctx%d", name(), i);
210 threadContexts[i]->regStats(namestr.str());
211 }
212 } else if (size == 1)
213 threadContexts[0]->regStats(name());
214
215#if FULL_SYSTEM
216#endif
217}
218
219
220void
221BaseCPU::registerThreadContexts()
222{
223 for (int i = 0; i < threadContexts.size(); ++i) {
224 ThreadContext *tc = threadContexts[i];
225
226#if FULL_SYSTEM
227 int id = params->cpu_id;
228 if (id != -1)
229 id += i;
230
231 tc->setCpuId(system->registerThreadContext(tc, id));
232#else
233 tc->setCpuId(tc->getProcessPtr()->registerThreadContext(tc));
234#endif
235 }
236}
237
238
239void
240BaseCPU::switchOut(Sampler *sampler)
240BaseCPU::switchOut()
241{
242 panic("This CPU doesn't support sampling!");
243}
244
245void
246BaseCPU::takeOverFrom(BaseCPU *oldCPU)
247{
248 assert(threadContexts.size() == oldCPU->threadContexts.size());
249
250 for (int i = 0; i < threadContexts.size(); ++i) {
251 ThreadContext *newTC = threadContexts[i];
252 ThreadContext *oldTC = oldCPU->threadContexts[i];
253
254 newTC->takeOverFrom(oldTC);
255
256 CpuEvent::replaceThreadContext(oldTC, newTC);
257
258 assert(newTC->readCpuId() == oldTC->readCpuId());
259#if FULL_SYSTEM
260 system->replaceThreadContext(newTC, newTC->readCpuId());
261#else
262 assert(newTC->getProcessPtr() == oldTC->getProcessPtr());
263 newTC->getProcessPtr()->replaceThreadContext(newTC, newTC->readCpuId());
264#endif
265 }
266
267#if FULL_SYSTEM
268 for (int i = 0; i < TheISA::NumInterruptLevels; ++i)
269 interrupts[i] = oldCPU->interrupts[i];
270 intstatus = oldCPU->intstatus;
271
272 for (int i = 0; i < threadContexts.size(); ++i)
273 threadContexts[i]->profileClear();
274
275 if (profileEvent)
276 profileEvent->schedule(curTick);
277#endif
278}
279
280
281#if FULL_SYSTEM
282BaseCPU::ProfileEvent::ProfileEvent(BaseCPU *_cpu, int _interval)
283 : Event(&mainEventQueue), cpu(_cpu), interval(_interval)
284{ }
285
286void
287BaseCPU::ProfileEvent::process()
288{
289 for (int i = 0, size = cpu->threadContexts.size(); i < size; ++i) {
290 ThreadContext *tc = cpu->threadContexts[i];
291 tc->profileSample();
292 }
293
294 schedule(curTick + interval);
295}
296
297void
298BaseCPU::post_interrupt(int int_num, int index)
299{
300 DPRINTF(Interrupt, "Interrupt %d:%d posted\n", int_num, index);
301
302 if (int_num < 0 || int_num >= TheISA::NumInterruptLevels)
303 panic("int_num out of bounds\n");
304
305 if (index < 0 || index >= sizeof(uint64_t) * 8)
306 panic("int_num out of bounds\n");
307
308 checkInterrupts = true;
309 interrupts[int_num] |= 1 << index;
310 intstatus |= (ULL(1) << int_num);
311}
312
313void
314BaseCPU::clear_interrupt(int int_num, int index)
315{
316 DPRINTF(Interrupt, "Interrupt %d:%d cleared\n", int_num, index);
317
318 if (int_num < 0 || int_num >= TheISA::NumInterruptLevels)
319 panic("int_num out of bounds\n");
320
321 if (index < 0 || index >= sizeof(uint64_t) * 8)
322 panic("int_num out of bounds\n");
323
324 interrupts[int_num] &= ~(1 << index);
325 if (interrupts[int_num] == 0)
326 intstatus &= ~(ULL(1) << int_num);
327}
328
329void
330BaseCPU::clear_interrupts()
331{
332 DPRINTF(Interrupt, "Interrupts all cleared\n");
333
334 memset(interrupts, 0, sizeof(interrupts));
335 intstatus = 0;
336}
337
338
339void
340BaseCPU::serialize(std::ostream &os)
341{
342 SERIALIZE_ARRAY(interrupts, TheISA::NumInterruptLevels);
343 SERIALIZE_SCALAR(intstatus);
344}
345
346void
347BaseCPU::unserialize(Checkpoint *cp, const std::string &section)
348{
349 UNSERIALIZE_ARRAY(interrupts, TheISA::NumInterruptLevels);
350 UNSERIALIZE_SCALAR(intstatus);
351}
352
353#endif // FULL_SYSTEM
354
355void
356BaseCPU::traceFunctionsInternal(Addr pc)
357{
358 if (!debugSymbolTable)
359 return;
360
361 // if pc enters different function, print new function symbol and
362 // update saved range. Otherwise do nothing.
363 if (pc < currentFunctionStart || pc >= currentFunctionEnd) {
364 string sym_str;
365 bool found = debugSymbolTable->findNearestSymbol(pc, sym_str,
366 currentFunctionStart,
367 currentFunctionEnd);
368
369 if (!found) {
370 // no symbol found: use addr as label
371 sym_str = csprintf("0x%x", pc);
372 currentFunctionStart = pc;
373 currentFunctionEnd = pc + 1;
374 }
375
376 ccprintf(*functionTraceStream, " (%d)\n%d: %s",
377 curTick - functionEntryTick, curTick, sym_str);
378 functionEntryTick = curTick;
379 }
380}
381
382
383DEFINE_SIM_OBJECT_CLASS_NAME("BaseCPU", BaseCPU)
241{
242 panic("This CPU doesn't support sampling!");
243}
244
245void
246BaseCPU::takeOverFrom(BaseCPU *oldCPU)
247{
248 assert(threadContexts.size() == oldCPU->threadContexts.size());
249
250 for (int i = 0; i < threadContexts.size(); ++i) {
251 ThreadContext *newTC = threadContexts[i];
252 ThreadContext *oldTC = oldCPU->threadContexts[i];
253
254 newTC->takeOverFrom(oldTC);
255
256 CpuEvent::replaceThreadContext(oldTC, newTC);
257
258 assert(newTC->readCpuId() == oldTC->readCpuId());
259#if FULL_SYSTEM
260 system->replaceThreadContext(newTC, newTC->readCpuId());
261#else
262 assert(newTC->getProcessPtr() == oldTC->getProcessPtr());
263 newTC->getProcessPtr()->replaceThreadContext(newTC, newTC->readCpuId());
264#endif
265 }
266
267#if FULL_SYSTEM
268 for (int i = 0; i < TheISA::NumInterruptLevels; ++i)
269 interrupts[i] = oldCPU->interrupts[i];
270 intstatus = oldCPU->intstatus;
271
272 for (int i = 0; i < threadContexts.size(); ++i)
273 threadContexts[i]->profileClear();
274
275 if (profileEvent)
276 profileEvent->schedule(curTick);
277#endif
278}
279
280
281#if FULL_SYSTEM
282BaseCPU::ProfileEvent::ProfileEvent(BaseCPU *_cpu, int _interval)
283 : Event(&mainEventQueue), cpu(_cpu), interval(_interval)
284{ }
285
286void
287BaseCPU::ProfileEvent::process()
288{
289 for (int i = 0, size = cpu->threadContexts.size(); i < size; ++i) {
290 ThreadContext *tc = cpu->threadContexts[i];
291 tc->profileSample();
292 }
293
294 schedule(curTick + interval);
295}
296
297void
298BaseCPU::post_interrupt(int int_num, int index)
299{
300 DPRINTF(Interrupt, "Interrupt %d:%d posted\n", int_num, index);
301
302 if (int_num < 0 || int_num >= TheISA::NumInterruptLevels)
303 panic("int_num out of bounds\n");
304
305 if (index < 0 || index >= sizeof(uint64_t) * 8)
306 panic("int_num out of bounds\n");
307
308 checkInterrupts = true;
309 interrupts[int_num] |= 1 << index;
310 intstatus |= (ULL(1) << int_num);
311}
312
313void
314BaseCPU::clear_interrupt(int int_num, int index)
315{
316 DPRINTF(Interrupt, "Interrupt %d:%d cleared\n", int_num, index);
317
318 if (int_num < 0 || int_num >= TheISA::NumInterruptLevels)
319 panic("int_num out of bounds\n");
320
321 if (index < 0 || index >= sizeof(uint64_t) * 8)
322 panic("int_num out of bounds\n");
323
324 interrupts[int_num] &= ~(1 << index);
325 if (interrupts[int_num] == 0)
326 intstatus &= ~(ULL(1) << int_num);
327}
328
329void
330BaseCPU::clear_interrupts()
331{
332 DPRINTF(Interrupt, "Interrupts all cleared\n");
333
334 memset(interrupts, 0, sizeof(interrupts));
335 intstatus = 0;
336}
337
338
339void
340BaseCPU::serialize(std::ostream &os)
341{
342 SERIALIZE_ARRAY(interrupts, TheISA::NumInterruptLevels);
343 SERIALIZE_SCALAR(intstatus);
344}
345
346void
347BaseCPU::unserialize(Checkpoint *cp, const std::string &section)
348{
349 UNSERIALIZE_ARRAY(interrupts, TheISA::NumInterruptLevels);
350 UNSERIALIZE_SCALAR(intstatus);
351}
352
353#endif // FULL_SYSTEM
354
355void
356BaseCPU::traceFunctionsInternal(Addr pc)
357{
358 if (!debugSymbolTable)
359 return;
360
361 // if pc enters different function, print new function symbol and
362 // update saved range. Otherwise do nothing.
363 if (pc < currentFunctionStart || pc >= currentFunctionEnd) {
364 string sym_str;
365 bool found = debugSymbolTable->findNearestSymbol(pc, sym_str,
366 currentFunctionStart,
367 currentFunctionEnd);
368
369 if (!found) {
370 // no symbol found: use addr as label
371 sym_str = csprintf("0x%x", pc);
372 currentFunctionStart = pc;
373 currentFunctionEnd = pc + 1;
374 }
375
376 ccprintf(*functionTraceStream, " (%d)\n%d: %s",
377 curTick - functionEntryTick, curTick, sym_str);
378 functionEntryTick = curTick;
379 }
380}
381
382
383DEFINE_SIM_OBJECT_CLASS_NAME("BaseCPU", BaseCPU)