base.cc (8948:e95ee70f876c) | base.cc (8975:7f36d4436074) |
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1/* 2 * Copyright (c) 2011-2012 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 518 unchanged lines hidden (view full) --- 527 528 ccprintf(*functionTraceStream, " (%d)\n%d: %s", 529 curTick() - functionEntryTick, curTick(), sym_str); 530 functionEntryTick = curTick(); 531 } 532} 533 534bool | 1/* 2 * Copyright (c) 2011-2012 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 518 unchanged lines hidden (view full) --- 527 528 ccprintf(*functionTraceStream, " (%d)\n%d: %s", 529 curTick() - functionEntryTick, curTick(), sym_str); 530 functionEntryTick = curTick(); 531 } 532} 533 534bool |
535BaseCPU::CpuPort::recvTiming(PacketPtr pkt) | 535BaseCPU::CpuPort::recvTimingResp(PacketPtr pkt) |
536{ 537 panic("BaseCPU doesn't expect recvTiming!\n"); 538 return true; 539} 540 541void 542BaseCPU::CpuPort::recvRetry() 543{ 544 panic("BaseCPU doesn't expect recvRetry!\n"); 545} 546 547void 548BaseCPU::CpuPort::recvFunctionalSnoop(PacketPtr pkt) 549{ 550 // No internal storage to update (in the general case). A CPU with 551 // internal storage, e.g. an LSQ that should be part of the 552 // coherent memory has to check against stored data. 553} | 536{ 537 panic("BaseCPU doesn't expect recvTiming!\n"); 538 return true; 539} 540 541void 542BaseCPU::CpuPort::recvRetry() 543{ 544 panic("BaseCPU doesn't expect recvRetry!\n"); 545} 546 547void 548BaseCPU::CpuPort::recvFunctionalSnoop(PacketPtr pkt) 549{ 550 // No internal storage to update (in the general case). A CPU with 551 // internal storage, e.g. an LSQ that should be part of the 552 // coherent memory has to check against stored data. 553} |