base.cc (8922:17f037ad8918) | base.cc (8948:e95ee70f876c) |
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1/* 2 * Copyright (c) 2011-2012 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 520 unchanged lines hidden (view full) --- 529 curTick() - functionEntryTick, curTick(), sym_str); 530 functionEntryTick = curTick(); 531 } 532} 533 534bool 535BaseCPU::CpuPort::recvTiming(PacketPtr pkt) 536{ | 1/* 2 * Copyright (c) 2011-2012 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 520 unchanged lines hidden (view full) --- 529 curTick() - functionEntryTick, curTick(), sym_str); 530 functionEntryTick = curTick(); 531 } 532} 533 534bool 535BaseCPU::CpuPort::recvTiming(PacketPtr pkt) 536{ |
537 panic("BaseCPU doesn't expect recvTiming callback!"); | 537 panic("BaseCPU doesn't expect recvTiming!\n"); |
538 return true; 539} 540 541void 542BaseCPU::CpuPort::recvRetry() 543{ | 538 return true; 539} 540 541void 542BaseCPU::CpuPort::recvRetry() 543{ |
544 panic("BaseCPU doesn't expect recvRetry callback!"); | 544 panic("BaseCPU doesn't expect recvRetry!\n"); |
545} 546 | 545} 546 |
547Tick 548BaseCPU::CpuPort::recvAtomic(PacketPtr pkt) 549{ 550 panic("BaseCPU doesn't expect recvAtomic callback!"); 551 return curTick(); 552} 553 | |
554void | 547void |
555BaseCPU::CpuPort::recvFunctional(PacketPtr pkt) | 548BaseCPU::CpuPort::recvFunctionalSnoop(PacketPtr pkt) |
556{ | 549{ |
557 // No internal storage to update (in the general case). In the 558 // long term this should never be called, but that assumed a split 559 // into master/slave and request/response. | 550 // No internal storage to update (in the general case). A CPU with 551 // internal storage, e.g. an LSQ that should be part of the 552 // coherent memory has to check against stored data. |
560} | 553} |