base.cc (12276:22c220be30c5) | base.cc (12277:e6455b421c4b) |
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1/* 2 * Copyright (c) 2011-2012,2016-2017 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 124 unchanged lines hidden (view full) --- 133 _switchedOut(p->switched_out), _cacheLineSize(p->system->cacheLineSize()), 134 interrupts(p->interrupts), profileEvent(NULL), 135 numThreads(p->numThreads), system(p->system), 136 functionTraceStream(nullptr), currentFunctionStart(0), 137 currentFunctionEnd(0), functionEntryTick(0), 138 addressMonitor(p->numThreads), 139 syscallRetryLatency(p->syscallRetryLatency), 140 pwrGatingLatency(p->pwr_gating_latency), | 1/* 2 * Copyright (c) 2011-2012,2016-2017 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 124 unchanged lines hidden (view full) --- 133 _switchedOut(p->switched_out), _cacheLineSize(p->system->cacheLineSize()), 134 interrupts(p->interrupts), profileEvent(NULL), 135 numThreads(p->numThreads), system(p->system), 136 functionTraceStream(nullptr), currentFunctionStart(0), 137 currentFunctionEnd(0), functionEntryTick(0), 138 addressMonitor(p->numThreads), 139 syscallRetryLatency(p->syscallRetryLatency), 140 pwrGatingLatency(p->pwr_gating_latency), |
141 powerGatingOnIdle(p->power_gating_on_idle), |
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141 enterPwrGatingEvent([this]{ enterPwrGating(); }, name()) 142{ 143 // if Python did not provide a valid ID, do it here 144 if (_cpuId == -1 ) { 145 _cpuId = cpuList.size(); 146 } 147 148 // add self to global list of CPUs --- 339 unchanged lines hidden (view full) --- 488void 489BaseCPU::schedulePowerGatingEvent() 490{ 491 for (auto tc : threadContexts) { 492 if (tc->status() == ThreadContext::Active) 493 return; 494 } 495 | 142 enterPwrGatingEvent([this]{ enterPwrGating(); }, name()) 143{ 144 // if Python did not provide a valid ID, do it here 145 if (_cpuId == -1 ) { 146 _cpuId = cpuList.size(); 147 } 148 149 // add self to global list of CPUs --- 339 unchanged lines hidden (view full) --- 489void 490BaseCPU::schedulePowerGatingEvent() 491{ 492 for (auto tc : threadContexts) { 493 if (tc->status() == ThreadContext::Active) 494 return; 495 } 496 |
496 if (ClockedObject::pwrState() == Enums::PwrState::CLK_GATED) { | 497 if (ClockedObject::pwrState() == Enums::PwrState::CLK_GATED && 498 powerGatingOnIdle) { |
497 assert(!enterPwrGatingEvent.scheduled()); 498 // Schedule a power gating event when clock gated for the specified 499 // amount of time 500 schedule(enterPwrGatingEvent, clockEdge(pwrGatingLatency)); 501 } 502} 503 504int --- 26 unchanged lines hidden (view full) --- 531 if (t->status() != ThreadContext::Suspended) { 532 return; 533 } 534 } 535 536 // All CPU threads suspended, enter lower power state for the CPU 537 ClockedObject::pwrState(Enums::PwrState::CLK_GATED); 538 | 499 assert(!enterPwrGatingEvent.scheduled()); 500 // Schedule a power gating event when clock gated for the specified 501 // amount of time 502 schedule(enterPwrGatingEvent, clockEdge(pwrGatingLatency)); 503 } 504} 505 506int --- 26 unchanged lines hidden (view full) --- 533 if (t->status() != ThreadContext::Suspended) { 534 return; 535 } 536 } 537 538 // All CPU threads suspended, enter lower power state for the CPU 539 ClockedObject::pwrState(Enums::PwrState::CLK_GATED); 540 |
539 //Schedule power gating event when clock gated for a configurable cycles 540 schedule(enterPwrGatingEvent, clockEdge(pwrGatingLatency)); | 541 // If pwrGatingLatency is set to 0 then this mechanism is disabled 542 if (powerGatingOnIdle) { 543 // Schedule power gating event when clock gated for pwrGatingLatency 544 // cycles 545 schedule(enterPwrGatingEvent, clockEdge(pwrGatingLatency)); 546 } |
541} 542 543void 544BaseCPU::enterPwrGating(void) 545{ 546 ClockedObject::pwrState(Enums::PwrState::OFF); 547} 548 --- 285 unchanged lines hidden --- | 547} 548 549void 550BaseCPU::enterPwrGating(void) 551{ 552 ClockedObject::pwrState(Enums::PwrState::OFF); 553} 554 --- 285 unchanged lines hidden --- |