1/*
2 * Copyright (c) 2011-2012,2016 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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243 "per thread (%i)\n",
244 name(), interrupts.size(), numThreads);
245 for (ThreadID tid = 0; tid < numThreads; tid++)
246 interrupts[tid]->setCPU(this);
247 }
248
249 if (FullSystem) {
250 if (params()->profile)
251 profileEvent = new ProfileEvent(this, params()->profile);
252 }
253 tracer = params()->tracer;
254
255 if (params()->isa.size() != numThreads) {
256 fatal("Number of ISAs (%i) assigned to the CPU does not equal number "
257 "of threads (%i).\n", params()->isa.size(), numThreads);
258 }
259}

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653 tc.getDTBPtr()->flushAll();
654 if (checker) {
655 checker->getITBPtr()->flushAll();
656 checker->getDTBPtr()->flushAll();
657 }
658 }
659}
660
661
662BaseCPU::ProfileEvent::ProfileEvent(BaseCPU *_cpu, Tick _interval)
663 : cpu(_cpu), interval(_interval)
664{ }
665
666void
667BaseCPU::ProfileEvent::process()
668{
669 ThreadID size = cpu->threadContexts.size();
670 for (ThreadID i = 0; i < size; ++i) {
671 ThreadContext *tc = cpu->threadContexts[i];
672 tc->profileSample();
673 }
674
675 cpu->schedule(this, curTick() + interval);
676}
677
678void
679BaseCPU::serialize(CheckpointOut &cp) const
680{
681 SERIALIZE_SCALAR(instCnt);
682
683 if (!_switchedOut) {

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