StaticInstFlags.py (12110:c24ee249b8ba) StaticInstFlags.py (12768:9a299ec956ac)
1# Copyright (c) 2003-2005 The Regents of The University of Michigan
2# Copyright (c) 2013 Advanced Micro Devices, Inc.
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions are
7# met: redistributions of source code must retain the above copyright
8# notice, this list of conditions and the following disclaimer;

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59 'IsFloating', # References FP regs.
60 'IsCC', # References CC regs.
61 'IsVector', # References Vector regs.
62 'IsVectorElem', # References Vector reg elems.
63
64 'IsMemRef', # References memory (load, store, or prefetch)
65 'IsLoad', # Reads from memory (load or prefetch).
66 'IsStore', # Writes to memory.
1# Copyright (c) 2003-2005 The Regents of The University of Michigan
2# Copyright (c) 2013 Advanced Micro Devices, Inc.
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions are
7# met: redistributions of source code must retain the above copyright
8# notice, this list of conditions and the following disclaimer;

--- 50 unchanged lines hidden (view full) ---

59 'IsFloating', # References FP regs.
60 'IsCC', # References CC regs.
61 'IsVector', # References Vector regs.
62 'IsVectorElem', # References Vector reg elems.
63
64 'IsMemRef', # References memory (load, store, or prefetch)
65 'IsLoad', # Reads from memory (load or prefetch).
66 'IsStore', # Writes to memory.
67 'IsAtomic', # Does atomic RMW to memory.
67 'IsStoreConditional', # Store conditional instruction.
68 'IsIndexed', # Accesses memory with an indexed address
69 # computation
70 'IsInstPrefetch', # Instruction-cache prefetch.
71 'IsDataPrefetch', # Data-cache prefetch.
72
73 'IsControl', # Control transfer instruction.
74 'IsDirectControl', # PC relative control transfer.

--- 40 unchanged lines hidden --- 		68 'IsStoreConditional', # Store conditional instruction.
69 'IsIndexed', # Accesses memory with an indexed address
70 # computation
71 'IsInstPrefetch', # Instruction-cache prefetch.
72 'IsDataPrefetch', # Data-cache prefetch.
73
74 'IsControl', # Control transfer instruction.
75 'IsDirectControl', # PC relative control transfer.

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