SConscript (8733:64a7bf8fa56c) SConscript (8739:925f15f96322)
1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright

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104# List of suppported CPUs by the Checker. Errors out if USE_CHECKER=True
105# and one of these are not being used.
106CheckerSupportedCPUList = ['O3CPU', 'OzoneCPU']
107
108SimObject('BaseCPU.py')
109SimObject('FuncUnit.py')
110SimObject('ExeTracer.py')
111SimObject('IntelTrace.py')
1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright

--- 95 unchanged lines hidden (view full) ---

104# List of suppported CPUs by the Checker. Errors out if USE_CHECKER=True
105# and one of these are not being used.
106CheckerSupportedCPUList = ['O3CPU', 'OzoneCPU']
107
108SimObject('BaseCPU.py')
109SimObject('FuncUnit.py')
110SimObject('ExeTracer.py')
111SimObject('IntelTrace.py')
112SimObject('IntrControl.py')
112SimObject('NativeTrace.py')
113
114Source('activity.cc')
115Source('base.cc')
116Source('cpuevent.cc')
117Source('decode.cc')
118Source('exetrace.cc')
119Source('func_unit.cc')
120Source('inteltrace.cc')
113SimObject('NativeTrace.py')
114
115Source('activity.cc')
116Source('base.cc')
117Source('cpuevent.cc')
118Source('decode.cc')
119Source('exetrace.cc')
120Source('func_unit.cc')
121Source('inteltrace.cc')
122Source('intr_control.cc')
121Source('nativetrace.cc')
122Source('pc_event.cc')
123Source('quiesce_event.cc')
124Source('static_inst.cc')
125Source('simple_thread.cc')
126Source('thread_context.cc')
127Source('thread_state.cc')
128
129if env['FULL_SYSTEM']:
123Source('nativetrace.cc')
124Source('pc_event.cc')
125Source('quiesce_event.cc')
126Source('static_inst.cc')
127Source('simple_thread.cc')
128Source('thread_context.cc')
129Source('thread_state.cc')
130
131if env['FULL_SYSTEM']:
130 SimObject('IntrControl.py')
131
132 Source('intr_control.cc')
133 Source('profile.cc')
134
135 if env['TARGET_ISA'] == 'sparc':
136 SimObject('LegionTrace.py')
137 Source('legiontrace.cc')
138
139if env['USE_CHECKER']:
132 Source('profile.cc')
133
134 if env['TARGET_ISA'] == 'sparc':
135 SimObject('LegionTrace.py')
136 Source('legiontrace.cc')
137
138if env['USE_CHECKER']:
140 SimObject('DummyChecker.py')
141 Source('checker/cpu.cc')
139 Source('checker/cpu.cc')
142 Source('dummy_checker_builder.cc')
143 DebugFlag('Checker')
144 checker_supports = False
145 for i in CheckerSupportedCPUList:
146 if i in env['CPU_MODELS']:
147 checker_supports = True
148 if not checker_supports:
149 print "Checker only supports CPU models",
150 for i in CheckerSupportedCPUList:

--- 43 unchanged lines hidden --- 		140 DebugFlag('Checker')
141 checker_supports = False
142 for i in CheckerSupportedCPUList:
143 if i in env['CPU_MODELS']:
144 checker_supports = True
145 if not checker_supports:
146 print "Checker only supports CPU models",
147 for i in CheckerSupportedCPUList:

--- 43 unchanged lines hidden ---