SConscript (6226:f1076450ab2b) SConscript (6365:a3037fa327a0)
1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright

--- 98 unchanged lines hidden (view full) ---

107# List of suppported CPUs by the Checker. Errors out if USE_CHECKER=True
108# and one of these are not being used.
109CheckerSupportedCPUList = ['O3CPU', 'OzoneCPU']
110
111SimObject('BaseCPU.py')
112SimObject('FuncUnit.py')
113SimObject('ExeTracer.py')
114SimObject('IntelTrace.py')
1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright

--- 98 unchanged lines hidden (view full) ---

107# List of suppported CPUs by the Checker. Errors out if USE_CHECKER=True
108# and one of these are not being used.
109CheckerSupportedCPUList = ['O3CPU', 'OzoneCPU']
110
111SimObject('BaseCPU.py')
112SimObject('FuncUnit.py')
113SimObject('ExeTracer.py')
114SimObject('IntelTrace.py')
115SimObject('NativeTrace.py')
115
116Source('activity.cc')
117Source('base.cc')
118Source('cpuevent.cc')
119Source('exetrace.cc')
120Source('func_unit.cc')
121Source('inteltrace.cc')
116
117Source('activity.cc')
118Source('base.cc')
119Source('cpuevent.cc')
120Source('exetrace.cc')
121Source('func_unit.cc')
122Source('inteltrace.cc')
123Source('nativetrace.cc')
122Source('pc_event.cc')
123Source('quiesce_event.cc')
124Source('static_inst.cc')
125Source('simple_thread.cc')
126Source('thread_context.cc')
127Source('thread_state.cc')
128
129if env['FULL_SYSTEM']:
130 SimObject('IntrControl.py')
131
132 Source('intr_control.cc')
133 Source('profile.cc')
134
135 if env['TARGET_ISA'] == 'sparc':
136 SimObject('LegionTrace.py')
137 Source('legiontrace.cc')
138
124Source('pc_event.cc')
125Source('quiesce_event.cc')
126Source('static_inst.cc')
127Source('simple_thread.cc')
128Source('thread_context.cc')
129Source('thread_state.cc')
130
131if env['FULL_SYSTEM']:
132 SimObject('IntrControl.py')
133
134 Source('intr_control.cc')
135 Source('profile.cc')
136
137 if env['TARGET_ISA'] == 'sparc':
138 SimObject('LegionTrace.py')
139 Source('legiontrace.cc')
140
139if env['TARGET_ISA'] == 'x86':
140 SimObject('NativeTrace.py')
141 Source('nativetrace.cc')
142
143if env['USE_CHECKER']:
144 Source('checker/cpu.cc')
145 TraceFlag('Checker')
146 checker_supports = False
147 for i in CheckerSupportedCPUList:
148 if i in env['CPU_MODELS']:
149 checker_supports = True
150 if not checker_supports:

--- 33 unchanged lines hidden --- 		141if env['USE_CHECKER']:
142 Source('checker/cpu.cc')
143 TraceFlag('Checker')
144 checker_supports = False
145 for i in CheckerSupportedCPUList:
146 if i in env['CPU_MODELS']:
147 checker_supports = True
148 if not checker_supports:

--- 33 unchanged lines hidden ---