SConscript (6181:19fedb1e5ded) | SConscript (6184:c947586b3d9e) |
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1# -*- mode:python -*- 2 3# Copyright (c) 2006 The Regents of The University of Michigan 4# All rights reserved. 5# 6# Redistribution and use in source and binary forms, with or without 7# modification, are permitted provided that the following conditions are 8# met: redistributions of source code must retain the above copyright --- 114 unchanged lines hidden (view full) --- 123Source('inteltrace.cc') 124Source('pc_event.cc') 125Source('quiesce_event.cc') 126Source('static_inst.cc') 127Source('simple_thread.cc') 128Source('thread_context.cc') 129Source('thread_state.cc') 130 | 1# -*- mode:python -*- 2 3# Copyright (c) 2006 The Regents of The University of Michigan 4# All rights reserved. 5# 6# Redistribution and use in source and binary forms, with or without 7# modification, are permitted provided that the following conditions are 8# met: redistributions of source code must retain the above copyright --- 114 unchanged lines hidden (view full) --- 123Source('inteltrace.cc') 124Source('pc_event.cc') 125Source('quiesce_event.cc') 126Source('static_inst.cc') 127Source('simple_thread.cc') 128Source('thread_context.cc') 129Source('thread_state.cc') 130 |
131if 'InOrderCPU' in env['CPU_MODELS'] or 'O3CPU' in env['CPU_MODELS']: 132 Source('btb.cc') 133 Source('tournament_pred.cc') 134 Source('2bit_local_pred.cc') 135 Source('ras.cc') 136 TraceFlag('FreeList') 137 |
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131if env['FULL_SYSTEM']: 132 SimObject('IntrControl.py') 133 134 Source('intr_control.cc') 135 Source('profile.cc') 136 137 if env['TARGET_ISA'] == 'sparc': 138 SimObject('LegionTrace.py') --- 47 unchanged lines hidden --- | 138if env['FULL_SYSTEM']: 139 SimObject('IntrControl.py') 140 141 Source('intr_control.cc') 142 Source('profile.cc') 143 144 if env['TARGET_ISA'] == 'sparc': 145 SimObject('LegionTrace.py') --- 47 unchanged lines hidden --- |