SConscript (5793:321f79ddb500) SConscript (5865:54ed46881217)
1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright

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43# CPU model-specific data is contained in cpu_models.py
44# Convert to SCons File node to get path handling
45models_db = File('cpu_models.py')
46# slurp in contents of file
47execfile(models_db.srcnode().abspath)
48
49# Template for execute() signature.
50exec_sig_template = '''
1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright

--- 34 unchanged lines hidden (view full) ---

43# CPU model-specific data is contained in cpu_models.py
44# Convert to SCons File node to get path handling
45models_db = File('cpu_models.py')
46# slurp in contents of file
47execfile(models_db.srcnode().abspath)
48
49# Template for execute() signature.
50exec_sig_template = '''
51virtual Fault execute(%s *xc, Trace::InstRecord *traceData) const = 0;
52virtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const
51virtual Fault execute(%(type)s *xc, Trace::InstRecord *traceData) const = 0;
52virtual Fault initiateAcc(%(type)s *xc, Trace::InstRecord *traceData) const
53{ panic("initiateAcc not defined!"); M5_DUMMY_RETURN };
53{ panic("initiateAcc not defined!"); M5_DUMMY_RETURN };
54virtual Fault completeAcc(Packet *pkt, %s *xc,
54virtual Fault completeAcc(Packet *pkt, %(type)s *xc,
55 Trace::InstRecord *traceData) const
56{ panic("completeAcc not defined!"); M5_DUMMY_RETURN };
55 Trace::InstRecord *traceData) const
56{ panic("completeAcc not defined!"); M5_DUMMY_RETURN };
57virtual int memAccSize(%(type)s *xc)
58{ panic("memAccSize not defined!"); M5_DUMMY_RETURN };
57'''
58
59mem_ini_sig_template = '''
60virtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); M5_DUMMY_RETURN };
61'''
62
63mem_comp_sig_template = '''
64virtual Fault completeAcc(uint8_t *data, %s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); return NoFault; M5_DUMMY_RETURN };

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77def gen_cpu_exec_signatures(target, source, env):
78 f = open(str(target[0]), 'w')
79 print >> f, '''
80#ifndef __CPU_STATIC_INST_EXEC_SIGS_HH__
81#define __CPU_STATIC_INST_EXEC_SIGS_HH__
82'''
83 for cpu in temp_cpu_list:
84 xc_type = CpuModel.dict[cpu].strings['CPU_exec_context']
59'''
60
61mem_ini_sig_template = '''
62virtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); M5_DUMMY_RETURN };
63'''
64
65mem_comp_sig_template = '''
66virtual Fault completeAcc(uint8_t *data, %s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); return NoFault; M5_DUMMY_RETURN };

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79def gen_cpu_exec_signatures(target, source, env):
80 f = open(str(target[0]), 'w')
81 print >> f, '''
82#ifndef __CPU_STATIC_INST_EXEC_SIGS_HH__
83#define __CPU_STATIC_INST_EXEC_SIGS_HH__
84'''
85 for cpu in temp_cpu_list:
86 xc_type = CpuModel.dict[cpu].strings['CPU_exec_context']
85 print >> f, exec_sig_template % (xc_type, xc_type, xc_type)
87 print >> f, exec_sig_template % { 'type' : xc_type }
86 print >> f, '''
87#endif // __CPU_STATIC_INST_EXEC_SIGS_HH__
88'''
89
90# Generate string that gets printed when header is rebuilt
91def gen_sigs_string(target, source, env):
92 return "Generating static_inst_exec_sigs.hh: " \
93 + ', '.join(temp_cpu_list)

--- 84 unchanged lines hidden --- 		88 print >> f, '''
89#endif // __CPU_STATIC_INST_EXEC_SIGS_HH__
90'''
91
92# Generate string that gets printed when header is rebuilt
93def gen_sigs_string(target, source, env):
94 return "Generating static_inst_exec_sigs.hh: " \
95 + ', '.join(temp_cpu_list)

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