SConscript (4762:c94e103c83ad) SConscript (4776:8c8407243a2c)
1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright

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100env.Depends('static_inst_exec_sigs.hh', Value(env['CPU_MODELS']))
101
102# List of suppported CPUs by the Checker. Errors out if USE_CHECKER=True
103# and one of these are not being used.
104CheckerSupportedCPUList = ['O3CPU', 'OzoneCPU']
105
106SimObject('BaseCPU.py')
107SimObject('FuncUnit.py')
1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright

--- 91 unchanged lines hidden (view full) ---

100env.Depends('static_inst_exec_sigs.hh', Value(env['CPU_MODELS']))
101
102# List of suppported CPUs by the Checker. Errors out if USE_CHECKER=True
103# and one of these are not being used.
104CheckerSupportedCPUList = ['O3CPU', 'OzoneCPU']
105
106SimObject('BaseCPU.py')
107SimObject('FuncUnit.py')
108SimObject('ExeTracer.py')
109SimObject('IntelTrace.py')
108
109Source('activity.cc')
110Source('base.cc')
111Source('cpuevent.cc')
112Source('exetrace.cc')
113Source('func_unit.cc')
110
111Source('activity.cc')
112Source('base.cc')
113Source('cpuevent.cc')
114Source('exetrace.cc')
115Source('func_unit.cc')
116Source('inteltrace.cc')
114Source('pc_event.cc')
115Source('quiesce_event.cc')
116Source('static_inst.cc')
117Source('simple_thread.cc')
118Source('thread_state.cc')
119
120if env['FULL_SYSTEM']:
121 SimObject('IntrControl.py')
122
123 Source('intr_control.cc')
124 Source('profile.cc')
125
117Source('pc_event.cc')
118Source('quiesce_event.cc')
119Source('static_inst.cc')
120Source('simple_thread.cc')
121Source('thread_state.cc')
122
123if env['FULL_SYSTEM']:
124 SimObject('IntrControl.py')
125
126 Source('intr_control.cc')
127 Source('profile.cc')
128
129 if env['TARGET_ISA'] == 'sparc':
130 SimObject('LegionTrace.py')
131 Source('legiontrace.cc')
132
133if env['TARGET_ISA'] == 'x86':
134 SimObject('NativeTrace.py')
135 Source('nativetrace.cc')
136
126if env['USE_CHECKER']:
127 Source('checker/cpu.cc')
128 checker_supports = False
129 for i in CheckerSupportedCPUList:
130 if i in env['CPU_MODELS']:
131 checker_supports = True
132 if not checker_supports:
133 print "Checker only supports CPU models",
134 for i in CheckerSupportedCPUList:
135 print i,
136 print ", please set USE_CHECKER=False or use one of those CPU models"
137 Exit(1)
137if env['USE_CHECKER']:
138 Source('checker/cpu.cc')
139 checker_supports = False
140 for i in CheckerSupportedCPUList:
141 if i in env['CPU_MODELS']:
142 checker_supports = True
143 if not checker_supports:
144 print "Checker only supports CPU models",
145 for i in CheckerSupportedCPUList:
146 print i,
147 print ", please set USE_CHECKER=False or use one of those CPU models"
148 Exit(1)