SConscript (3187:7eefad0aed11) SConscript (3918:1f9a98d198e8)
1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright

--- 40 unchanged lines hidden (view full) ---

49models_db = File('cpu_models.py')
50# slurp in contents of file
51execfile(models_db.srcnode().abspath)
52
53# Template for execute() signature.
54exec_sig_template = '''
55virtual Fault execute(%s *xc, Trace::InstRecord *traceData) const = 0;
56virtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const
1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright

--- 40 unchanged lines hidden (view full) ---

49models_db = File('cpu_models.py')
50# slurp in contents of file
51execfile(models_db.srcnode().abspath)
52
53# Template for execute() signature.
54exec_sig_template = '''
55virtual Fault execute(%s *xc, Trace::InstRecord *traceData) const = 0;
56virtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const
57{ panic("initiateAcc not defined!"); };
57{ panic("initiateAcc not defined!"); M5_DUMMY_RETURN };
58virtual Fault completeAcc(Packet *pkt, %s *xc,
59 Trace::InstRecord *traceData) const
58virtual Fault completeAcc(Packet *pkt, %s *xc,
59 Trace::InstRecord *traceData) const
60{ panic("completeAcc not defined!"); };
60{ panic("completeAcc not defined!"); M5_DUMMY_RETURN };
61'''
62
63mem_ini_sig_template = '''
61'''
62
63mem_ini_sig_template = '''
64virtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); };
64virtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); M5_DUMMY_RETURN };
65'''
66
67mem_comp_sig_template = '''
65'''
66
67mem_comp_sig_template = '''
68virtual Fault completeAcc(uint8_t *data, %s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); return NoFault; };
68virtual Fault completeAcc(uint8_t *data, %s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); return NoFault; M5_DUMMY_RETURN };
69'''
70
71# Generate a temporary CPU list, including the CheckerCPU if
72# it's enabled. This isn't used for anything else other than StaticInst
73# headers.
74temp_cpu_list = env['CPU_MODELS'][:]
75
76if env['USE_CHECKER']:

--- 137 unchanged lines hidden --- 		69'''
70
71# Generate a temporary CPU list, including the CheckerCPU if
72# it's enabled. This isn't used for anything else other than StaticInst
73# headers.
74temp_cpu_list = env['CPU_MODELS'][:]
75
76if env['USE_CHECKER']:

--- 137 unchanged lines hidden ---