SConscript (10664:61a0b02aa800) SConscript (10695:ef2c71a5f02e)
1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright

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30
31Import('*')
32
33if env['TARGET_ISA'] == 'null':
34 SimObject('IntrControl.py')
35 Source('intr_control_noisa.cc')
36 Return()
37
1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright

--- 21 unchanged lines hidden (view full) ---

30
31Import('*')
32
33if env['TARGET_ISA'] == 'null':
34 SimObject('IntrControl.py')
35 Source('intr_control_noisa.cc')
36 Return()
37
38# Only build the protocol buffer instructions tracer if we have protobuf support
39if env['HAVE_PROTOBUF'] and env['TARGET_ISA'] != 'x86':
40 SimObject('InstPBTrace.py')
41 Source('inst_pb_trace.cc')
42
38SimObject('CheckerCPU.py')
39
40SimObject('BaseCPU.py')
41SimObject('CPUTracers.py')
42SimObject('FuncUnit.py')
43SimObject('IntrControl.py')
44SimObject('TimingExpr.py')
45

--- 65 unchanged lines hidden ---
43SimObject('CheckerCPU.py')
44
45SimObject('BaseCPU.py')
46SimObject('CPUTracers.py')
47SimObject('FuncUnit.py')
48SimObject('IntrControl.py')
49SimObject('TimingExpr.py')
50

--- 65 unchanged lines hidden ---