SConscript (10529:05b5a6cf3521) SConscript (10662:c3fd4c020e49)
1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright

--- 50 unchanged lines hidden (view full) ---

59Source('quiesce_event.cc')
60Source('reg_class.cc')
61Source('static_inst.cc')
62Source('simple_thread.cc')
63Source('thread_context.cc')
64Source('thread_state.cc')
65Source('timing_expr.cc')
66
1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright

--- 50 unchanged lines hidden (view full) ---

59Source('quiesce_event.cc')
60Source('reg_class.cc')
61Source('static_inst.cc')
62Source('simple_thread.cc')
63Source('thread_context.cc')
64Source('thread_state.cc')
65Source('timing_expr.cc')
66
67if env['TARGET_ISA'] == 'sparc':
68 SimObject('LegionTrace.py')
69 Source('legiontrace.cc')
70
71SimObject('DummyChecker.py')
72SimObject('StaticInstFlags.py')
73Source('checker/cpu.cc')
74Source('dummy_checker.cc')
75DebugFlag('Checker')
76
77DebugFlag('Activity')
78DebugFlag('Commit')

--- 39 unchanged lines hidden --- 		67SimObject('DummyChecker.py')
68SimObject('StaticInstFlags.py')
69Source('checker/cpu.cc')
70Source('dummy_checker.cc')
71DebugFlag('Checker')
72
73DebugFlag('Activity')
74DebugFlag('Commit')

--- 39 unchanged lines hidden ---