SConscript (10201:30a20d2072c1) SConscript (10259:ebb376f73dd2)
1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright

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101env.Depends('static_inst_exec_sigs.hh', Value(env['CPU_MODELS']))
102
103SimObject('BaseCPU.py')
104SimObject('FuncUnit.py')
105SimObject('ExeTracer.py')
106SimObject('IntelTrace.py')
107SimObject('IntrControl.py')
108SimObject('NativeTrace.py')
1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright

--- 92 unchanged lines hidden (view full) ---

101env.Depends('static_inst_exec_sigs.hh', Value(env['CPU_MODELS']))
102
103SimObject('BaseCPU.py')
104SimObject('FuncUnit.py')
105SimObject('ExeTracer.py')
106SimObject('IntelTrace.py')
107SimObject('IntrControl.py')
108SimObject('NativeTrace.py')
109SimObject('TimingExpr.py')
109
110Source('activity.cc')
111Source('base.cc')
112Source('cpuevent.cc')
113Source('exetrace.cc')
114Source('func_unit.cc')
115Source('inteltrace.cc')
116Source('intr_control.cc')
117Source('nativetrace.cc')
118Source('pc_event.cc')
119Source('profile.cc')
120Source('quiesce_event.cc')
121Source('reg_class.cc')
122Source('static_inst.cc')
123Source('simple_thread.cc')
124Source('thread_context.cc')
125Source('thread_state.cc')
110
111Source('activity.cc')
112Source('base.cc')
113Source('cpuevent.cc')
114Source('exetrace.cc')
115Source('func_unit.cc')
116Source('inteltrace.cc')
117Source('intr_control.cc')
118Source('nativetrace.cc')
119Source('pc_event.cc')
120Source('profile.cc')
121Source('quiesce_event.cc')
122Source('reg_class.cc')
123Source('static_inst.cc')
124Source('simple_thread.cc')
125Source('thread_context.cc')
126Source('thread_state.cc')
127Source('timing_expr.cc')
126
127if env['TARGET_ISA'] == 'sparc':
128 SimObject('LegionTrace.py')
129 Source('legiontrace.cc')
130
131SimObject('DummyChecker.py')
132SimObject('StaticInstFlags.py')
133Source('checker/cpu.cc')

--- 42 unchanged lines hidden --- 		128
129if env['TARGET_ISA'] == 'sparc':
130 SimObject('LegionTrace.py')
131 Source('legiontrace.cc')
132
133SimObject('DummyChecker.py')
134SimObject('StaticInstFlags.py')
135Source('checker/cpu.cc')

--- 42 unchanged lines hidden ---