1# -*- mode:python -*- 2 3# Copyright (c) 2006 The Regents of The University of Michigan 4# All rights reserved. 5# 6# Redistribution and use in source and binary forms, with or without 7# modification, are permitted provided that the following conditions are 8# met: redistributions of source code must retain the above copyright --- 98 unchanged lines hidden (view full) --- 107# List of suppported CPUs by the Checker. Errors out if USE_CHECKER=True 108# and one of these are not being used. 109CheckerSupportedCPUList = ['O3CPU', 'OzoneCPU'] 110 111SimObject('BaseCPU.py') 112SimObject('FuncUnit.py') 113SimObject('ExeTracer.py') 114SimObject('IntelTrace.py') |
115SimObject('NativeTrace.py') |
116 117Source('activity.cc') 118Source('base.cc') 119Source('cpuevent.cc') 120Source('exetrace.cc') 121Source('func_unit.cc') 122Source('inteltrace.cc') |
123Source('nativetrace.cc') |
124Source('pc_event.cc') 125Source('quiesce_event.cc') 126Source('static_inst.cc') 127Source('simple_thread.cc') 128Source('thread_context.cc') 129Source('thread_state.cc') 130 131if env['FULL_SYSTEM']: 132 SimObject('IntrControl.py') 133 134 Source('intr_control.cc') 135 Source('profile.cc') 136 137 if env['TARGET_ISA'] == 'sparc': 138 SimObject('LegionTrace.py') 139 Source('legiontrace.cc') 140 |
141if env['USE_CHECKER']: 142 Source('checker/cpu.cc') 143 TraceFlag('Checker') 144 checker_supports = False 145 for i in CheckerSupportedCPUList: 146 if i in env['CPU_MODELS']: 147 checker_supports = True 148 if not checker_supports: --- 33 unchanged lines hidden --- |