1# -*- mode:python -*- 2 3# Copyright (c) 2006 The Regents of The University of Michigan 4# All rights reserved. 5# 6# Redistribution and use in source and binary forms, with or without 7# modification, are permitted provided that the following conditions are 8# met: redistributions of source code must retain the above copyright 9# notice, this list of conditions and the following disclaimer; 10# redistributions in binary form must reproduce the above copyright 11# notice, this list of conditions and the following disclaimer in the 12# documentation and/or other materials provided with the distribution; 13# neither the name of the copyright holders nor the names of its 14# contributors may be used to endorse or promote products derived from 15# this software without specific prior written permission. 16# 17# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28# 29# Authors: Steve Reinhardt 30 31Import('*') 32 33################################################################# 34# 35# Generate StaticInst execute() method signatures. 36# 37# There must be one signature for each CPU model compiled in. 38# Since the set of compiled-in models is flexible, we generate a 39# header containing the appropriate set of signatures on the fly. 40# 41################################################################# 42 43# CPU model-specific data is contained in cpu_models.py 44# Convert to SCons File node to get path handling 45models_db = File('cpu_models.py') 46# slurp in contents of file 47execfile(models_db.srcnode().abspath) 48 49# Template for execute() signature. 50exec_sig_template = ''' 51virtual Fault execute(%(type)s *xc, Trace::InstRecord *traceData) const = 0;
| 1# -*- mode:python -*- 2 3# Copyright (c) 2006 The Regents of The University of Michigan 4# All rights reserved. 5# 6# Redistribution and use in source and binary forms, with or without 7# modification, are permitted provided that the following conditions are 8# met: redistributions of source code must retain the above copyright 9# notice, this list of conditions and the following disclaimer; 10# redistributions in binary form must reproduce the above copyright 11# notice, this list of conditions and the following disclaimer in the 12# documentation and/or other materials provided with the distribution; 13# neither the name of the copyright holders nor the names of its 14# contributors may be used to endorse or promote products derived from 15# this software without specific prior written permission. 16# 17# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28# 29# Authors: Steve Reinhardt 30 31Import('*') 32 33################################################################# 34# 35# Generate StaticInst execute() method signatures. 36# 37# There must be one signature for each CPU model compiled in. 38# Since the set of compiled-in models is flexible, we generate a 39# header containing the appropriate set of signatures on the fly. 40# 41################################################################# 42 43# CPU model-specific data is contained in cpu_models.py 44# Convert to SCons File node to get path handling 45models_db = File('cpu_models.py') 46# slurp in contents of file 47execfile(models_db.srcnode().abspath) 48 49# Template for execute() signature. 50exec_sig_template = ''' 51virtual Fault execute(%(type)s *xc, Trace::InstRecord *traceData) const = 0;
|
62virtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); M5_DUMMY_RETURN }; 63''' 64 65mem_comp_sig_template = ''' 66virtual Fault completeAcc(uint8_t *data, %s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); return NoFault; M5_DUMMY_RETURN }; 67''' 68 69# Generate a temporary CPU list, including the CheckerCPU if 70# it's enabled. This isn't used for anything else other than StaticInst 71# headers. 72temp_cpu_list = env['CPU_MODELS'][:] 73 74if env['USE_CHECKER']: 75 temp_cpu_list.append('CheckerCPU') 76 SimObject('CheckerCPU.py') 77 78# Generate header. 79def gen_cpu_exec_signatures(target, source, env): 80 f = open(str(target[0]), 'w') 81 print >> f, ''' 82#ifndef __CPU_STATIC_INST_EXEC_SIGS_HH__ 83#define __CPU_STATIC_INST_EXEC_SIGS_HH__ 84''' 85 for cpu in temp_cpu_list: 86 xc_type = CpuModel.dict[cpu].strings['CPU_exec_context'] 87 print >> f, exec_sig_template % { 'type' : xc_type } 88 print >> f, ''' 89#endif // __CPU_STATIC_INST_EXEC_SIGS_HH__ 90''' 91 92# Generate string that gets printed when header is rebuilt 93def gen_sigs_string(target, source, env): 94 return "Generating static_inst_exec_sigs.hh: " \ 95 + ', '.join(temp_cpu_list) 96 97# Add command to generate header to environment. 98env.Command('static_inst_exec_sigs.hh', models_db, 99 Action(gen_cpu_exec_signatures, gen_sigs_string, 100 varlist = temp_cpu_list)) 101 102env.Depends('static_inst_exec_sigs.hh', Value(env['USE_CHECKER'])) 103env.Depends('static_inst_exec_sigs.hh', Value(env['CPU_MODELS'])) 104 105# List of suppported CPUs by the Checker. Errors out if USE_CHECKER=True 106# and one of these are not being used. 107CheckerSupportedCPUList = ['O3CPU', 'OzoneCPU'] 108 109SimObject('BaseCPU.py') 110SimObject('FuncUnit.py') 111SimObject('ExeTracer.py') 112SimObject('IntelTrace.py') 113 114Source('activity.cc') 115Source('base.cc') 116Source('cpuevent.cc') 117Source('exetrace.cc') 118Source('func_unit.cc') 119Source('inteltrace.cc') 120Source('pc_event.cc') 121Source('quiesce_event.cc') 122Source('static_inst.cc') 123Source('simple_thread.cc') 124Source('thread_context.cc') 125Source('thread_state.cc') 126 127if env['FULL_SYSTEM']: 128 SimObject('IntrControl.py') 129 130 Source('intr_control.cc') 131 Source('profile.cc') 132 133 if env['TARGET_ISA'] == 'sparc': 134 SimObject('LegionTrace.py') 135 Source('legiontrace.cc') 136 137if env['TARGET_ISA'] == 'x86': 138 SimObject('NativeTrace.py') 139 Source('nativetrace.cc') 140 141if env['USE_CHECKER']: 142 Source('checker/cpu.cc') 143 TraceFlag('Checker') 144 checker_supports = False 145 for i in CheckerSupportedCPUList: 146 if i in env['CPU_MODELS']: 147 checker_supports = True 148 if not checker_supports: 149 print "Checker only supports CPU models", 150 for i in CheckerSupportedCPUList: 151 print i, 152 print ", please set USE_CHECKER=False or use one of those CPU models" 153 Exit(1) 154 155TraceFlag('Activity') 156TraceFlag('Commit') 157TraceFlag('Context') 158TraceFlag('Decode') 159TraceFlag('DynInst') 160TraceFlag('ExecEnable') 161TraceFlag('ExecCPSeq') 162TraceFlag('ExecEffAddr') 163TraceFlag('ExecFetchSeq') 164TraceFlag('ExecOpClass') 165TraceFlag('ExecRegDelta') 166TraceFlag('ExecResult') 167TraceFlag('ExecSpeculative') 168TraceFlag('ExecSymbol') 169TraceFlag('ExecThread') 170TraceFlag('ExecTicks') 171TraceFlag('ExecMicro') 172TraceFlag('ExecMacro') 173TraceFlag('Fetch') 174TraceFlag('IntrControl') 175TraceFlag('PCEvent') 176TraceFlag('Quiesce') 177 178CompoundFlag('Exec', [ 'ExecEnable', 'ExecTicks', 'ExecOpClass', 'ExecThread', 179 'ExecEffAddr', 'ExecResult', 'ExecSymbol', 'ExecMicro' ]) 180CompoundFlag('ExecNoTicks', [ 'ExecEnable', 'ExecOpClass', 'ExecThread', 181 'ExecEffAddr', 'ExecResult', 'ExecMicro' ])
| 66virtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); M5_DUMMY_RETURN }; 67''' 68 69mem_comp_sig_template = ''' 70virtual Fault completeAcc(uint8_t *data, %s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); return NoFault; M5_DUMMY_RETURN }; 71''' 72 73# Generate a temporary CPU list, including the CheckerCPU if 74# it's enabled. This isn't used for anything else other than StaticInst 75# headers. 76temp_cpu_list = env['CPU_MODELS'][:] 77 78if env['USE_CHECKER']: 79 temp_cpu_list.append('CheckerCPU') 80 SimObject('CheckerCPU.py') 81 82# Generate header. 83def gen_cpu_exec_signatures(target, source, env): 84 f = open(str(target[0]), 'w') 85 print >> f, ''' 86#ifndef __CPU_STATIC_INST_EXEC_SIGS_HH__ 87#define __CPU_STATIC_INST_EXEC_SIGS_HH__ 88''' 89 for cpu in temp_cpu_list: 90 xc_type = CpuModel.dict[cpu].strings['CPU_exec_context'] 91 print >> f, exec_sig_template % { 'type' : xc_type } 92 print >> f, ''' 93#endif // __CPU_STATIC_INST_EXEC_SIGS_HH__ 94''' 95 96# Generate string that gets printed when header is rebuilt 97def gen_sigs_string(target, source, env): 98 return "Generating static_inst_exec_sigs.hh: " \ 99 + ', '.join(temp_cpu_list) 100 101# Add command to generate header to environment. 102env.Command('static_inst_exec_sigs.hh', models_db, 103 Action(gen_cpu_exec_signatures, gen_sigs_string, 104 varlist = temp_cpu_list)) 105 106env.Depends('static_inst_exec_sigs.hh', Value(env['USE_CHECKER'])) 107env.Depends('static_inst_exec_sigs.hh', Value(env['CPU_MODELS'])) 108 109# List of suppported CPUs by the Checker. Errors out if USE_CHECKER=True 110# and one of these are not being used. 111CheckerSupportedCPUList = ['O3CPU', 'OzoneCPU'] 112 113SimObject('BaseCPU.py') 114SimObject('FuncUnit.py') 115SimObject('ExeTracer.py') 116SimObject('IntelTrace.py') 117 118Source('activity.cc') 119Source('base.cc') 120Source('cpuevent.cc') 121Source('exetrace.cc') 122Source('func_unit.cc') 123Source('inteltrace.cc') 124Source('pc_event.cc') 125Source('quiesce_event.cc') 126Source('static_inst.cc') 127Source('simple_thread.cc') 128Source('thread_context.cc') 129Source('thread_state.cc') 130 131if env['FULL_SYSTEM']: 132 SimObject('IntrControl.py') 133 134 Source('intr_control.cc') 135 Source('profile.cc') 136 137 if env['TARGET_ISA'] == 'sparc': 138 SimObject('LegionTrace.py') 139 Source('legiontrace.cc') 140 141if env['TARGET_ISA'] == 'x86': 142 SimObject('NativeTrace.py') 143 Source('nativetrace.cc') 144 145if env['USE_CHECKER']: 146 Source('checker/cpu.cc') 147 TraceFlag('Checker') 148 checker_supports = False 149 for i in CheckerSupportedCPUList: 150 if i in env['CPU_MODELS']: 151 checker_supports = True 152 if not checker_supports: 153 print "Checker only supports CPU models", 154 for i in CheckerSupportedCPUList: 155 print i, 156 print ", please set USE_CHECKER=False or use one of those CPU models" 157 Exit(1) 158 159TraceFlag('Activity') 160TraceFlag('Commit') 161TraceFlag('Context') 162TraceFlag('Decode') 163TraceFlag('DynInst') 164TraceFlag('ExecEnable') 165TraceFlag('ExecCPSeq') 166TraceFlag('ExecEffAddr') 167TraceFlag('ExecFetchSeq') 168TraceFlag('ExecOpClass') 169TraceFlag('ExecRegDelta') 170TraceFlag('ExecResult') 171TraceFlag('ExecSpeculative') 172TraceFlag('ExecSymbol') 173TraceFlag('ExecThread') 174TraceFlag('ExecTicks') 175TraceFlag('ExecMicro') 176TraceFlag('ExecMacro') 177TraceFlag('Fetch') 178TraceFlag('IntrControl') 179TraceFlag('PCEvent') 180TraceFlag('Quiesce') 181 182CompoundFlag('Exec', [ 'ExecEnable', 'ExecTicks', 'ExecOpClass', 'ExecThread', 183 'ExecEffAddr', 'ExecResult', 'ExecSymbol', 'ExecMicro' ]) 184CompoundFlag('ExecNoTicks', [ 'ExecEnable', 'ExecOpClass', 'ExecThread', 185 'ExecEffAddr', 'ExecResult', 'ExecMicro' ])
|