1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright
--- 104 unchanged lines hidden (view full) ---
113Source('exetrace.cc')
114Source('func_unit.cc')
115Source('inteltrace.cc')
116Source('intr_control.cc')
117Source('nativetrace.cc')
118Source('pc_event.cc')
119Source('profile.cc')
120Source('quiesce_event.cc')
121Source('static_inst.cc')
122Source('simple_thread.cc')
123Source('thread_context.cc')
124Source('thread_state.cc')
125
126if env['TARGET_ISA'] == 'sparc':
127 SimObject('LegionTrace.py')
128 Source('legiontrace.cc')
--- 45 unchanged lines hidden ---
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright
--- 104 unchanged lines hidden (view full) ---
113Source('exetrace.cc')
114Source('func_unit.cc')
115Source('inteltrace.cc')
116Source('intr_control.cc')
117Source('nativetrace.cc')
118Source('pc_event.cc')
119Source('profile.cc')
120Source('quiesce_event.cc')
121Source('static_inst.cc')
122Source('simple_thread.cc')
123Source('thread_context.cc')
124Source('thread_state.cc')
125
126if env['TARGET_ISA'] == 'sparc':
127 SimObject('LegionTrace.py')
128 Source('legiontrace.cc')
--- 45 unchanged lines hidden ---