1# Copyright (c) 2005-2008 The Regents of The University of Michigan 2# Copyright (c) 2011 Regents of the University of California 3# All rights reserved. 4# 5# Redistribution and use in source and binary forms, with or without 6# modification, are permitted provided that the following conditions are 7# met: redistributions of source code must retain the above copyright 8# notice, this list of conditions and the following disclaimer; --- 64 unchanged lines hidden (view full) --- 73 74 checker = Param.BaseCPU(NULL, "checker CPU") 75 76 do_checkpoint_insts = Param.Bool(True, 77 "enable checkpoint pseudo instructions") 78 do_statistics_insts = Param.Bool(True, 79 "enable statistics pseudo instructions") 80 |
81 profile = Param.Latency('0ns', "trace the kernel stack") 82 do_quiesce = Param.Bool(True, "enable quiesce instructions") 83 84 if not buildEnv['FULL_SYSTEM']: |
85 workload = VectorParam.Process("processes to run") 86 87 if buildEnv['TARGET_ISA'] == 'sparc': 88 dtb = Param.SparcTLB(SparcTLB(), "Data TLB") 89 itb = Param.SparcTLB(SparcTLB(), "Instruction TLB") 90 interrupts = Param.SparcInterrupts( 91 SparcInterrupts(), "Interrupt Controller") 92 elif buildEnv['TARGET_ISA'] == 'alpha': --- 95 unchanged lines hidden --- |