103a104,105
> if build_env['TARGET_ISA'] == 'x86' and build_env['FULL_SYSTEM']:
> _mem_ports = ["itb.walker.port", "dtb.walker.port"]
111c113
< assert(len(self._mem_ports) == 2 or len(self._mem_ports) == 3)
---
> assert(len(self._mem_ports) < 6)
116a119,120
> if build_env['TARGET_ISA'] == 'x86' and build_env['FULL_SYSTEM']:
> self._mem_ports += ["itb.walker_port", "dtb.walker_port"]