x86_traits.hh (9010:7891b96e1526) x86_traits.hh (9040:cdfe09f9bdee)
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 */
37
38#ifndef __ARCH_X86_X86TRAITS_HH__
39#define __ARCH_X86_X86TRAITS_HH__
40
41#include <cassert>
42
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 26 unchanged lines hidden (view full) ---

35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 */
37
38#ifndef __ARCH_X86_X86TRAITS_HH__
39#define __ARCH_X86_X86TRAITS_HH__
40
41#include <cassert>
42
43#include "arch/x86/types.hh"
43#include "base/types.hh"
44
45namespace X86ISA
46{
47 const int NumMicroIntRegs = 16;
48
49 const int NumPseudoIntRegs = 4;
50 //1. The condition code bits of the rflags register.

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99 }
100
101 static inline Addr
102 x86InterruptAddress(const uint8_t id, const uint16_t addr)
103 {
104 assert(addr < PhysAddrAPICRangeSize);
105 return PhysAddrPrefixInterrupts | (id * PhysAddrAPICRangeSize) | addr;
106 }
44#include "base/types.hh"
45
46namespace X86ISA
47{
48 const int NumMicroIntRegs = 16;
49
50 const int NumPseudoIntRegs = 4;
51 //1. The condition code bits of the rflags register.

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100 }
101
102 static inline Addr
103 x86InterruptAddress(const uint8_t id, const uint16_t addr)
104 {
105 assert(addr < PhysAddrAPICRangeSize);
106 return PhysAddrPrefixInterrupts | (id * PhysAddrAPICRangeSize) | addr;
107 }
108
109 const ExtMachInst NoopMachInst = {
110 0x0, // No legacy prefixes.
111 0x0, // No rex prefix.
112 { 1, 0x0, 0x0, 0x90 }, // One opcode byte, 0x90.
113 0x0, 0x0, // No modrm or sib.
114 0, 0, // No immediate or displacement.
115 8, 8, 8, // All sizes are 8.
116 0, // Displacement size is 0.
117 SixtyFourBitMode // Behave as if we're in 64 bit
118 // mode (this doesn't actually matter).
119 };
107}
108
109#endif //__ARCH_X86_X86TRAITS_HH__
120}
121
122#endif //__ARCH_X86_X86TRAITS_HH__