1/* 2 * Copyright (c) 2007 The Hewlett-Packard Development Company 3 * All rights reserved. 4 *
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5 * Redistribution and use of this software in source and binary forms, 6 * with or without modification, are permitted provided that the 7 * following conditions are met:
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8 *
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9 * The software must be used only for Non-Commercial Use which means any 10 * use which is NOT directed to receiving any direct monetary 11 * compensation for, or commercial advantage from such use. Illustrative 12 * examples of non-commercial use are academic research, personal study, 13 * teaching, education and corporate research & development. 14 * Illustrative examples of commercial use are distributing products for 15 * commercial advantage and providing services using the software for 16 * commercial advantage. 17 * 18 * If you wish to use this software or functionality therein that may be 19 * covered by patents for commercial use, please contact: 20 * Director of Intellectual Property Licensing 21 * Office of Strategy and Technology 22 * Hewlett-Packard Company 23 * 1501 Page Mill Road 24 * Palo Alto, California 94304 25 * 26 * Redistributions of source code must retain the above copyright notice, 27 * this list of conditions and the following disclaimer. Redistributions 28 * in binary form must reproduce the above copyright notice, this list of 29 * conditions and the following disclaimer in the documentation and/or 30 * other materials provided with the distribution. Neither the name of 31 * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
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33 * this software without specific prior written permission. No right of 34 * sublicense is granted herewith. Derivatives of the software and 35 * output created using the software may be prepared, but only for 36 * Non-Commercial Uses. Derivatives of the software may be shared with 37 * others provided: (i) the others agree to abide by the list of 38 * conditions herein which includes the Non-Commercial Use restrictions; 39 * and (ii) such Derivatives of the software include the above copyright 40 * notice to acknowledge the contribution from this software where 41 * applicable, this list of conditions and the disclaimer below.
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42 * 43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
| 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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54 * 55 * Authors: Gabe Black
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56 */ 57 58#ifndef __ARCH_X86_X86TRAITS_HH__ 59#define __ARCH_X86_X86TRAITS_HH__ 60 61#include <cassert> 62 63#include "base/types.hh" 64 65namespace X86ISA 66{ 67 const int NumMicroIntRegs = 16; 68 69 const int NumPseudoIntRegs = 1; 70 //1. The condition code bits of the rflags register. 71 const int NumImplicitIntRegs = 6; 72 //1. The lower part of the result of multiplication. 73 //2. The upper part of the result of multiplication. 74 //3. The quotient from division 75 //4. The remainder from division 76 //5. The divisor for division 77 //6. The register to use for shift doubles 78 79 const int NumMMXRegs = 8; 80 const int NumXMMRegs = 16; 81 const int NumMicroFpRegs = 8; 82 83 const int NumCRegs = 16; 84 const int NumDRegs = 8; 85 86 const int NumSegments = 6; 87 const int NumSysSegments = 4; 88 89 const Addr IntAddrPrefixMask = ULL(0xffffffff00000000); 90 const Addr IntAddrPrefixCPUID = ULL(0x100000000); 91 const Addr IntAddrPrefixMSR = ULL(0x200000000); 92 const Addr IntAddrPrefixIO = ULL(0x300000000); 93 94 const Addr PhysAddrPrefixIO = ULL(0x8000000000000000); 95 const Addr PhysAddrPrefixPciConfig = ULL(0xC000000000000000); 96 const Addr PhysAddrPrefixLocalAPIC = ULL(0x2000000000000000); 97 const Addr PhysAddrPrefixInterrupts = ULL(0xA000000000000000); 98 // Each APIC gets two pages. One page is used for local apics to field 99 // accesses from the CPU, and the other is for all APICs to communicate. 100 const Addr PhysAddrAPICRangeSize = 1 << 12; 101 102 static inline Addr 103 x86IOAddress(const uint32_t port) 104 { 105 return PhysAddrPrefixIO | port; 106 } 107 108 static inline Addr 109 x86PciConfigAddress(const uint32_t addr) 110 { 111 return PhysAddrPrefixPciConfig | addr; 112 } 113 114 static inline Addr 115 x86LocalAPICAddress(const uint8_t id, const uint16_t addr) 116 { 117 assert(addr < (1 << 12)); 118 return PhysAddrPrefixLocalAPIC | (id * (1 << 12)) | addr; 119 } 120 121 static inline Addr 122 x86InterruptAddress(const uint8_t id, const uint16_t addr) 123 { 124 assert(addr < PhysAddrAPICRangeSize); 125 return PhysAddrPrefixInterrupts | (id * PhysAddrAPICRangeSize) | addr; 126 } 127} 128 129#endif //__ARCH_X86_X86TRAITS_HH__
| 36 */ 37 38#ifndef __ARCH_X86_X86TRAITS_HH__ 39#define __ARCH_X86_X86TRAITS_HH__ 40 41#include <cassert> 42 43#include "base/types.hh" 44 45namespace X86ISA 46{ 47 const int NumMicroIntRegs = 16; 48 49 const int NumPseudoIntRegs = 1; 50 //1. The condition code bits of the rflags register. 51 const int NumImplicitIntRegs = 6; 52 //1. The lower part of the result of multiplication. 53 //2. The upper part of the result of multiplication. 54 //3. The quotient from division 55 //4. The remainder from division 56 //5. The divisor for division 57 //6. The register to use for shift doubles 58 59 const int NumMMXRegs = 8; 60 const int NumXMMRegs = 16; 61 const int NumMicroFpRegs = 8; 62 63 const int NumCRegs = 16; 64 const int NumDRegs = 8; 65 66 const int NumSegments = 6; 67 const int NumSysSegments = 4; 68 69 const Addr IntAddrPrefixMask = ULL(0xffffffff00000000); 70 const Addr IntAddrPrefixCPUID = ULL(0x100000000); 71 const Addr IntAddrPrefixMSR = ULL(0x200000000); 72 const Addr IntAddrPrefixIO = ULL(0x300000000); 73 74 const Addr PhysAddrPrefixIO = ULL(0x8000000000000000); 75 const Addr PhysAddrPrefixPciConfig = ULL(0xC000000000000000); 76 const Addr PhysAddrPrefixLocalAPIC = ULL(0x2000000000000000); 77 const Addr PhysAddrPrefixInterrupts = ULL(0xA000000000000000); 78 // Each APIC gets two pages. One page is used for local apics to field 79 // accesses from the CPU, and the other is for all APICs to communicate. 80 const Addr PhysAddrAPICRangeSize = 1 << 12; 81 82 static inline Addr 83 x86IOAddress(const uint32_t port) 84 { 85 return PhysAddrPrefixIO | port; 86 } 87 88 static inline Addr 89 x86PciConfigAddress(const uint32_t addr) 90 { 91 return PhysAddrPrefixPciConfig | addr; 92 } 93 94 static inline Addr 95 x86LocalAPICAddress(const uint8_t id, const uint16_t addr) 96 { 97 assert(addr < (1 << 12)); 98 return PhysAddrPrefixLocalAPIC | (id * (1 << 12)) | addr; 99 } 100 101 static inline Addr 102 x86InterruptAddress(const uint8_t id, const uint16_t addr) 103 { 104 assert(addr < PhysAddrAPICRangeSize); 105 return PhysAddrPrefixInterrupts | (id * PhysAddrAPICRangeSize) | addr; 106 } 107} 108 109#endif //__ARCH_X86_X86TRAITS_HH__
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