utility.hh (7087:fb8d5786ff30) utility.hh (7627:3b0c4b819651)
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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80#if FULL_SYSTEM
81 HandyM5Reg m5reg = tc->readMiscRegNoEffect(MISCREG_M5_REG);
82 return m5reg.cpl == 3;
83#else
84 return true;
85#endif
86 }
87
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 71 unchanged lines hidden (view full) ---

80#if FULL_SYSTEM
81 HandyM5Reg m5reg = tc->readMiscRegNoEffect(MISCREG_M5_REG);
82 return m5reg.cpl == 3;
83#else
84 return true;
85#endif
86 }
87
88 inline bool isCallerSaveIntegerRegister(unsigned int reg) {
89 panic("register classification not implemented");
90 return false;
91 }
92
93 inline bool isCalleeSaveIntegerRegister(unsigned int reg) {
94 panic("register classification not implemented");
95 return false;
96 }
97
98 inline bool isCallerSaveFloatRegister(unsigned int reg) {
99 panic("register classification not implemented");
100 return false;
101 }
102
103 inline bool isCalleeSaveFloatRegister(unsigned int reg) {
104 panic("register classification not implemented");
105 return false;
106 }
107
108 // Instruction address compression hooks
109 inline Addr realPCToFetchPC(const Addr &addr)
110 {
111 return addr;
112 }
113
114 inline Addr fetchPCToRealPC(const Addr &addr)
115 {
116 return addr;
117 }
118
119 // the size of "fetched" instructions (not necessarily the size
120 // of real instructions for PISA)
121 inline size_t fetchInstSize()
122 {
123 return sizeof(MachInst);
124 }
125
126 /**
127 * Function to insure ISA semantics about 0 registers.
128 * @param tc The thread context.
129 */
130 template <class TC>
131 void zeroRegisters(TC *tc);
132
133#if FULL_SYSTEM

--- 13 unchanged lines hidden --- 		88 /**
89 * Function to insure ISA semantics about 0 registers.
90 * @param tc The thread context.
91 */
92 template <class TC>
93 void zeroRegisters(TC *tc);
94
95#if FULL_SYSTEM

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