utility.hh (7629:0f0c231e3e97) utility.hh (7680:f4eda002333b)
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Gabe Black
38 */
39
40#ifndef __ARCH_X86_UTILITY_HH__
41#define __ARCH_X86_UTILITY_HH__
42
43#include "arch/x86/regs/misc.hh"
44#include "arch/x86/types.hh"
45#include "base/hashmap.hh"
46#include "base/misc.hh"
47#include "base/types.hh"
48#include "config/full_system.hh"
49#include "cpu/thread_context.hh"
50
51class ThreadContext;
52
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Gabe Black
38 */
39
40#ifndef __ARCH_X86_UTILITY_HH__
41#define __ARCH_X86_UTILITY_HH__
42
43#include "arch/x86/regs/misc.hh"
44#include "arch/x86/types.hh"
45#include "base/hashmap.hh"
46#include "base/misc.hh"
47#include "base/types.hh"
48#include "config/full_system.hh"
49#include "cpu/thread_context.hh"
50
51class ThreadContext;
52
53namespace __hash_namespace {
54 template<>
55 struct hash<X86ISA::ExtMachInst> {
56 size_t operator()(const X86ISA::ExtMachInst &emi) const {
57 return (((uint64_t)emi.legacy << 56) |
58 ((uint64_t)emi.rex << 48) |
59 ((uint64_t)emi.modRM << 40) |
60 ((uint64_t)emi.sib << 32) |
61 ((uint64_t)emi.opcode.num << 24) |
62 ((uint64_t)emi.opcode.prefixA << 16) |
63 ((uint64_t)emi.opcode.prefixB << 8) |
64 ((uint64_t)emi.opcode.op)) ^
65 emi.immediate ^ emi.displacement ^
66 emi.mode ^
67 emi.opSize ^ emi.addrSize ^
68 emi.stackSize ^ emi.dispSize;
69 };
70 };
71}
72
73namespace X86ISA
74{
75 uint64_t getArgument(ThreadContext *tc, int number, bool fp);
76
77 static inline bool
78 inUserMode(ThreadContext *tc)
79 {
80#if FULL_SYSTEM
81 HandyM5Reg m5reg = tc->readMiscRegNoEffect(MISCREG_M5_REG);
82 return m5reg.cpl == 3;
83#else
84 return true;
85#endif
86 }
87
88 /**
89 * Function to insure ISA semantics about 0 registers.
90 * @param tc The thread context.
91 */
92 template <class TC>
93 void zeroRegisters(TC *tc);
94
95#if FULL_SYSTEM
96
97 void initCPU(ThreadContext *tc, int cpuId);
98
99#endif
100
101 void startupCPU(ThreadContext *tc, int cpuId);
102
103 void copyRegs(ThreadContext *src, ThreadContext *dest);
104
105 void copyMiscRegs(ThreadContext *src, ThreadContext *dest);
106};
107
108#endif // __ARCH_X86_UTILITY_HH__
53namespace X86ISA
54{
55 uint64_t getArgument(ThreadContext *tc, int number, bool fp);
56
57 static inline bool
58 inUserMode(ThreadContext *tc)
59 {
60#if FULL_SYSTEM
61 HandyM5Reg m5reg = tc->readMiscRegNoEffect(MISCREG_M5_REG);
62 return m5reg.cpl == 3;
63#else
64 return true;
65#endif
66 }
67
68 /**
69 * Function to insure ISA semantics about 0 registers.
70 * @param tc The thread context.
71 */
72 template <class TC>
73 void zeroRegisters(TC *tc);
74
75#if FULL_SYSTEM
76
77 void initCPU(ThreadContext *tc, int cpuId);
78
79#endif
80
81 void startupCPU(ThreadContext *tc, int cpuId);
82
83 void copyRegs(ThreadContext *src, ThreadContext *dest);
84
85 void copyMiscRegs(ThreadContext *src, ThreadContext *dest);
86};
87
88#endif // __ARCH_X86_UTILITY_HH__