utility.hh (4182:5b2c0d266107) | utility.hh (4194:af4f6022394b) |
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1/* 2 * Copyright (c) 2007 The Hewlett-Packard Development Company 3 * All rights reserved. 4 * 5 * Redistribution and use of this software in source and binary forms, 6 * with or without modification, are permitted provided that the 7 * following conditions are met: 8 * --- 45 unchanged lines hidden (view full) --- 54 * 55 * Authors: Gabe Black 56 */ 57 58#ifndef __ARCH_X86_UTILITY_HH__ 59#define __ARCH_X86_UTILITY_HH__ 60 61#include "arch/x86/types.hh" | 1/* 2 * Copyright (c) 2007 The Hewlett-Packard Development Company 3 * All rights reserved. 4 * 5 * Redistribution and use of this software in source and binary forms, 6 * with or without modification, are permitted provided that the 7 * following conditions are met: 8 * --- 45 unchanged lines hidden (view full) --- 54 * 55 * Authors: Gabe Black 56 */ 57 58#ifndef __ARCH_X86_UTILITY_HH__ 59#define __ARCH_X86_UTILITY_HH__ 60 61#include "arch/x86/types.hh" |
62#include "base/hashmap.hh" | |
63#include "base/misc.hh" 64#include "sim/host.hh" 65 66class ThreadContext; 67 | 62#include "base/misc.hh" 63#include "sim/host.hh" 64 65class ThreadContext; 66 |
68namespace __hash_namespace { 69 template<> 70 struct hash<X86ISA::ExtMachInst> { 71 size_t operator()(const X86ISA::ExtMachInst &emi) const { 72 //Because these are all the same, return 0 73 return 0; 74 }; 75 }; 76} 77 | |
78namespace X86ISA 79{ 80 static inline bool 81 inUserMode(ThreadContext *tc) 82 { 83 return false; 84 } 85 | 67namespace X86ISA 68{ 69 static inline bool 70 inUserMode(ThreadContext *tc) 71 { 72 return false; 73 } 74 |
75 inline ExtMachInst 76 makeExtMI(MachInst inst, ThreadContext * xc) { 77 return inst; 78 } 79 |
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86 inline bool isCallerSaveIntegerRegister(unsigned int reg) { 87 panic("register classification not implemented"); 88 return false; 89 } 90 91 inline bool isCalleeSaveIntegerRegister(unsigned int reg) { 92 panic("register classification not implemented"); 93 return false; --- 33 unchanged lines hidden (view full) --- 127 */ 128 template <class TC> 129 void zeroRegisters(TC *tc); 130 131 inline void initCPU(ThreadContext *tc, int cpuId) 132 { 133 panic("initCPU not implemented!\n"); 134 } | 80 inline bool isCallerSaveIntegerRegister(unsigned int reg) { 81 panic("register classification not implemented"); 82 return false; 83 } 84 85 inline bool isCalleeSaveIntegerRegister(unsigned int reg) { 86 panic("register classification not implemented"); 87 return false; --- 33 unchanged lines hidden (view full) --- 121 */ 122 template <class TC> 123 void zeroRegisters(TC *tc); 124 125 inline void initCPU(ThreadContext *tc, int cpuId) 126 { 127 panic("initCPU not implemented!\n"); 128 } |
129 130 inline void startupCPU(ThreadContext *tc, int cpuId) 131 { 132 tc->activate(0); 133 } |
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135}; 136 137#endif // __ARCH_X86_UTILITY_HH__ | 134}; 135 136#endif // __ARCH_X86_UTILITY_HH__ |