1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * Redistribution and use of this software in source and binary forms,
6 * with or without modification, are permitted provided that the
7 * following conditions are met:
8 *

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54 *
55 * Authors: Gabe Black
56 */
57
58#ifndef __ARCH_X86_UTILITY_HH__
59#define __ARCH_X86_UTILITY_HH__
60
61#include "arch/x86/types.hh"
62#include "base/hashmap.hh"
63#include "base/misc.hh"
64#include "sim/host.hh"
65
66class ThreadContext;
67
68namespace __hash_namespace {
69 template<>
70 struct hash<X86ISA::ExtMachInst> {
71 size_t operator()(const X86ISA::ExtMachInst &emi) const {
72 //Because these are all the same, return 0
73 return 0;
74 };
75 };
76}
77
78namespace X86ISA
79{
80 static inline bool
81 inUserMode(ThreadContext *tc)
82 {
83 return false;
84 }
85
86 inline bool isCallerSaveIntegerRegister(unsigned int reg) {
87 panic("register classification not implemented");
88 return false;
89 }
90
91 inline bool isCalleeSaveIntegerRegister(unsigned int reg) {
92 panic("register classification not implemented");
93 return false;

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127 */
128 template <class TC>
129 void zeroRegisters(TC *tc);
130
131 inline void initCPU(ThreadContext *tc, int cpuId)
132 {
133 panic("initCPU not implemented!\n");
134 }
135};
136
137#endif // __ARCH_X86_UTILITY_HH__