utility.cc (9921:ee049bfce978) | utility.cc (10057:09507a45c701) |
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1/* 2 * Copyright (c) 2007 The Hewlett-Packard Development Company 3 * Copyright (c) 2011 Advanced Micro Devices, Inc. 4 * All rights reserved. 5 * 6 * The license below extends only to copyright in the software and shall 7 * not be construed as granting a license to any other intellectual 8 * property including but not limited to intellectual property relating --- 247 unchanged lines hidden (view full) --- 256{ 257 panic("Not implemented for x86\n"); 258} 259 260uint64_t 261getRFlags(ThreadContext *tc) 262{ 263 const uint64_t ncc_flags(tc->readMiscRegNoEffect(MISCREG_RFLAGS)); | 1/* 2 * Copyright (c) 2007 The Hewlett-Packard Development Company 3 * Copyright (c) 2011 Advanced Micro Devices, Inc. 4 * All rights reserved. 5 * 6 * The license below extends only to copyright in the software and shall 7 * not be construed as granting a license to any other intellectual 8 * property including but not limited to intellectual property relating --- 247 unchanged lines hidden (view full) --- 256{ 257 panic("Not implemented for x86\n"); 258} 259 260uint64_t 261getRFlags(ThreadContext *tc) 262{ 263 const uint64_t ncc_flags(tc->readMiscRegNoEffect(MISCREG_RFLAGS)); |
264 const uint64_t cc_flags(tc->readIntReg(X86ISA::CCREG_ZAPS)); 265 const uint64_t cfof_bits(tc->readIntReg(X86ISA::CCREG_CFOF)); 266 const uint64_t df_bit(tc->readIntReg(X86ISA::CCREG_DF)); | 264 const uint64_t cc_flags(tc->readCCReg(X86ISA::CCREG_ZAPS)); 265 const uint64_t cfof_bits(tc->readCCReg(X86ISA::CCREG_CFOF)); 266 const uint64_t df_bit(tc->readCCReg(X86ISA::CCREG_DF)); |
267 // ecf (PSEUDO(3)) & ezf (PSEUDO(4)) are only visible to 268 // microcode, so we can safely ignore them. 269 270 // Reconstruct the real rflags state, mask out internal flags, and 271 // make sure reserved bits have the expected values. 272 return ((ncc_flags | cc_flags | cfof_bits | df_bit) & 0x3F7FD5) 273 | 0x2; 274} 275 276void 277setRFlags(ThreadContext *tc, uint64_t val) 278{ | 267 // ecf (PSEUDO(3)) & ezf (PSEUDO(4)) are only visible to 268 // microcode, so we can safely ignore them. 269 270 // Reconstruct the real rflags state, mask out internal flags, and 271 // make sure reserved bits have the expected values. 272 return ((ncc_flags | cc_flags | cfof_bits | df_bit) & 0x3F7FD5) 273 | 0x2; 274} 275 276void 277setRFlags(ThreadContext *tc, uint64_t val) 278{ |
279 tc->setIntReg(X86ISA::CCREG_ZAPS, val & ccFlagMask); 280 tc->setIntReg(X86ISA::CCREG_CFOF, val & cfofMask); 281 tc->setIntReg(X86ISA::CCREG_DF, val & DFBit); | 279 tc->setCCReg(X86ISA::CCREG_ZAPS, val & ccFlagMask); 280 tc->setCCReg(X86ISA::CCREG_CFOF, val & cfofMask); 281 tc->setCCReg(X86ISA::CCREG_DF, val & DFBit); |
282 283 // Internal microcode registers (ECF & EZF) | 282 283 // Internal microcode registers (ECF & EZF) |
284 tc->setIntReg(X86ISA::CCREG_ECF, 0); 285 tc->setIntReg(X86ISA::CCREG_EZF, 0); | 284 tc->setCCReg(X86ISA::CCREG_ECF, 0); 285 tc->setCCReg(X86ISA::CCREG_EZF, 0); |
286 287 // Update the RFLAGS misc reg with whatever didn't go into the 288 // magic registers. 289 tc->setMiscReg(MISCREG_RFLAGS, val & ~(ccFlagMask | cfofMask | DFBit)); 290} 291 292uint8_t 293convX87TagsToXTags(uint16_t ftw) --- 81 unchanged lines hidden --- | 286 287 // Update the RFLAGS misc reg with whatever didn't go into the 288 // magic registers. 289 tc->setMiscReg(MISCREG_RFLAGS, val & ~(ccFlagMask | cfofMask | DFBit)); 290} 291 292uint8_t 293convX87TagsToXTags(uint16_t ftw) --- 81 unchanged lines hidden --- |